Message-ID: <CAGS+omCdLbNu03c2DdiLEqNmGVkEoGu3972-YDp8ne5G9WZJ0g@mail.gmail.com>
Date:	Mon, 13 Jul 2015 18:20:07 +0800
From:	Daniel Kurtz <djkurtz@...omium.org>
To:	YH Huang <yh.huang@...iatek.com>
Cc:	Matthias Brugger <matthias.bgg@...il.com>,
	Mark Rutland <mark.rutland@....com>,
	Thierry Reding <thierry.reding@...il.com>,
	linux-pwm@...r.kernel.org,
	srv_heupstream <srv_heupstream@...iatek.com>,
	Pawel Moll <pawel.moll@....com>,
	"open list:OPEN FIRMWARE AND..." <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Rob Herring <robh+dt@...nel.org>,
	linux-mediatek@...ts.infradead.org,
	Sascha Hauer <kernel@...gutronix.de>,
	Yingjoe Chen <yingjoe.chen@...iatek.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v5 1/3] dt-bindings: pwm: add MediaTek display PWM bindings

On Mon, Jul 13, 2015 at 5:04 PM, YH Huang <yh.huang@...iatek.com> wrote:
> Document the device-tree binding of MediatTek display PWM.
> The PWM has one channel to control the backlight brightness for display.
> It supports MT8173 and MT6595.
>
> Signed-off-by: YH Huang <yh.huang@...iatek.com>
> ---
>  .../devicetree/bindings/pwm/pwm-mtk-disp.txt       | 29 ++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> new file mode 100644
> index 0000000..aac29dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt
> @@ -0,0 +1,29 @@
> +MediaTek display PWM controller
> +
> +Required properties:
> + - compatible: should be "mediatek,<name>-disp-pwm":
> +   - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
> +   - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
> + - reg: physical base address and length of the controller's registers.
> + - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
> +   the cell format.
> + - clocks: phandle and clock specifier of the PWM reference clock.
> + - clock-names: must contain the following:
> +   - "main": clock used to generate PWM signals.
> +   - "mm": sync signals from the modules of mmsys.
> + - pinctrl-names: Must contain a "default" entry.
> + - pinctrl-0: One property must exist for each entry in pinctrl-names.
> +   See pinctrl/pinctrl-bindings.txt for details of the property values.
> +
> +Example:
> +       pwm0: pwm@...1e000 {
> +               compatible = "mediatek,mt8173-disp-pwm",
> +                            "mediatek,mt6595-disp-pwm";
> +               reg = <0 0x1401e000 0 0x1000>;
> +               #pwm-cells = <2>;
> +               clocks = <&mmsys CLK_MM_DISP_PWM026M>,
> +                        <&mmsys CLK_MM_DISP_PWM0MM>;
> +               clock-names = "main", "mm";
> +               pinctrl-names = "default";
> +               pinctrl-0 = <&disp_pwm0_pins>;
> +       };

Please show an example consumer of the pwm phandle to show how to set
the two properties required by the #pwm-cells.
Although the pwm-specifier typically encodes the chip-relative PWM
number and the PWM period in nanoseconds, it is technically controller
specific.

In fact, since the mtk-disp-pwm does not have a chip-relative PWM
number, could we in fact set #pwm-cells = <1>, and only specify the
requested PWM period?

-Dan


> --
> 1.8.1.1.dirty
>
>
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> Linux-mediatek@...ts.infradead.org
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