[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAErSpo7NMNxe=B8BJMkr1SQ0xEshoiWsiUs1hJ+UgY=7eedYPQ@mail.gmail.com>
Date: Mon, 13 Jul 2015 16:13:34 -0500
From: Bjorn Helgaas <bhelgaas@...gle.com>
To: James Hogan <james.hogan@...tec.com>
Cc: Ralf Baechle <ralf@...ux-mips.org>,
Andrew Bresticker <abrestic@...omium.org>,
"linux-mips@...ux-mips.org" <linux-mips@...ux-mips.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 5/9] MIPS: Remove "weak" from get_c0_perfcount_int() declaration
On Mon, Jul 13, 2015 at 10:43:54AM +0100, James Hogan wrote:
> On 13/07/15 00:11, Bjorn Helgaas wrote:
> > Weak header file declarations are error-prone because they make every
> > definition weak, and the linker chooses one based on link order (see
> > 10629d711ed7 ("PCI: Remove __weak annotation from pcibios_get_phb_of_node
> > decl")).
> >
> > get_c0_perfcount_int() is defined in several files. Every definition is
> > weak, so I assume Kconfig prevents two or more from being included. The
> > callers contain identical default code used when get_c0_perfcount_int()
> > isn't defined at all.
> >
> > Add a weak get_c0_perfcount_int() definition with the default code and
> > remove the weak annotation from the declaration.
> >
> > Then the platform implementations will be strong and will override the weak
> > default. If multiple platforms are ever configured in, we'll get a link
> > error instead of calling a random platform's implementation.
> >
> > Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
> > CC: Andrew Bresticker <abrestic@...omium.org>
> > ---
> > arch/mips/include/asm/time.h | 2 +-
> > arch/mips/kernel/perf_event_mipsxx.c | 7 +------
> > arch/mips/kernel/time.c | 10 +++++++++-
> > arch/mips/oprofile/op_model_mipsxx.c | 8 +-------
> > 4 files changed, 12 insertions(+), 15 deletions(-)
> >
> > diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h
> > index 8ab2874..ce6a7d5 100644
> > --- a/arch/mips/include/asm/time.h
> > +++ b/arch/mips/include/asm/time.h
> > @@ -46,7 +46,7 @@ extern unsigned int mips_hpt_frequency;
> > * so it lives here.
> > */
> > extern int (*perf_irq)(void);
> > -extern int __weak get_c0_perfcount_int(void);
> > +extern int get_c0_perfcount_int(void);
> >
> > /*
> > * Initialize the calling CPU's compare interrupt as clockevent device
> > diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
> > index cc1b6fa..c126b1c 100644
> > --- a/arch/mips/kernel/perf_event_mipsxx.c
> > +++ b/arch/mips/kernel/perf_event_mipsxx.c
> > @@ -1682,12 +1682,7 @@ init_hw_perf_events(void)
> > counters = counters_total_to_per_cpu(counters);
> > #endif
> >
> > - if (get_c0_perfcount_int)
> > - irq = get_c0_perfcount_int();
> > - else if (cp0_perfcount_irq >= 0)
> > - irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
> > - else
> > - irq = -1;
> > + irq = get_c0_perfcount_int();
> >
> > mipspmu.map_raw_event = mipsxx_pmu_map_raw_event;
> >
> > diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
> > index 8d01709..ec7082d 100644
> > --- a/arch/mips/kernel/time.c
> > +++ b/arch/mips/kernel/time.c
> > @@ -55,9 +55,17 @@ static int null_perf_irq(void)
> > }
> >
> > int (*perf_irq)(void) = null_perf_irq;
> > -
> > EXPORT_SYMBOL(perf_irq);
> >
> > +#ifdef MIPS_CPU_IRQ_BASE
>
> why the ifdef? This would be the only such ifdef in the kernel, and
> arch/mips/include/asm/mach-generic/irq.h seems to ensure it is always
> defined anyway.
I added the ifdef because I got a build error in
arch/mips/kernel/time.c. But maybe I can fix that by including
<asm/irq.h> instead; that would be much nicer.
> > +int __weak get_c0_perfcount_int(void)
> > +{
> > + if (cp0_perfcount_irq >= 0)
> > + return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
> > + return -1;
> > +}
> > +#endif
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists