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Message-ID: <CAGS+omAQ7bKD4Jqwm=hv=D_aMxXpT4dKgzU4QqntnLEa0Fup-g@mail.gmail.com>
Date:	Tue, 14 Jul 2015 12:26:18 +0800
From:	Daniel Kurtz <djkurtz@...omium.org>
To:	Yingjoe Chen <yingjoe.chen@...iatek.com>
Cc:	Matthias Brugger <matthias.bgg@...il.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Michael Turquette <mturquette@...libre.com>,
	James Liao <jamesjj.liao@...iatek.com>,
	Russell King <linux@....linux.org.uk>,
	"open list:OPEN FIRMWARE AND..." <devicetree@...r.kernel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Catalin Marinas <catalin.marinas@....com>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Rob Herring <robh+dt@...nel.org>,
	linux-mediatek@...ts.infradead.org,
	Sascha Hauer <kernel@...gutronix.de>,
	Olof Johansson <olof@...om.net>,
	srv_heupstream <srv_heupstream@...iatek.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>, linux-clk@...r.kernel.org,
	Eddie Huang <eddie.huang@...iatek.com>
Subject: Re: [PATCH 5/5] arm64: dts: mt8173: add timer node

On Mon, Jul 13, 2015 at 5:32 PM, Yingjoe Chen <yingjoe.chen@...iatek.com> wrote:
> From: Daniel Kurtz <djkurtz@...omium.org>
>
> Add device node to enable GPT timer. This timer will be
> used as sched clock source.
>
> Signed-off-by: Daniel Kurtz <djkurtz@...omium.org>
> Signed-off-by: Eddie Huang <eddie.huang@...iatek.com>
> Signed-off-by: Yingjoe Chen <yingjoe.chen@...iatek.com>

This binding needs documentation.

> ---
>  arch/arm64/boot/dts/mediatek/mt8173.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> index 0696f8f..04bdd8f 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
> @@ -219,6 +219,15 @@
>                         reg = <0 0x10007000 0 0x100>;
>                 };
>
> +               timer: timer@...08000 {
> +                       compatible = "mediatek,mt8173-timer",
> +                                    "mediatek,mt6577-timer";
> +                       reg = <0 0x10008000 0 0x1000>;
> +                       interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_LOW>;
> +                       clocks = <&infracfg CLK_INFRA_CLK_13M>,
> +                                <&topckgen CLK_TOP_RTC_SEL>;

Why two clocks?  The driver only uses one.
Please use a clock-names property.

Thanks,
-Dan

> +               };
> +
>                 pwrap: pwrap@...0d000 {
>                         compatible = "mediatek,mt8173-pwrap";
>                         reg = <0 0x1000d000 0 0x1000>;
> --
> 1.8.1.1.dirty
>
--
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