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Message-ID: <55A5EC94.4090507@huawei.com>
Date: Wed, 15 Jul 2015 13:16:04 +0800
From: Yijing Wang <wangyijing@...wei.com>
To: Yinghai Lu <yinghai@...nel.org>
CC: Bjorn Helgaas <bhelgaas@...gle.com>,
David Miller <davem@...emloft.net>,
David Ahern <david.ahern@...cle.com>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Wei Yang <weiyang@...ux.vnet.ibm.com>, TJ <linux@....tj>,
Andrew Morton <akpm@...ux-foundation.org>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 17/36] PCI: Add support for more than two alt_size under
same bridge
On 2015/7/15 13:08, Yinghai Lu wrote:
> On Tue, Jul 14, 2015 at 8:07 PM, Yijing Wang <wangyijing@...wei.com> wrote:
>> On 2015/7/7 7:39, Yinghai Lu wrote:
>>> Need to increase size to make sure it could fit all alt entries.
>>>
>>> So at last, we use 8M/17M as parent bridge alt_align/alt_size.
>>
>> Tested-by: Yijing Wang <wangyijing@...wei.com>
>
> Thanks for testing.
>
>>
>> Hi Yinghai, does this patch depend on the previous items in this patchset ?
>
> Yes, it depends most of patches from patch1 to this patch.
>
>> Could you provide another version of this patch for stable branch, eg. 3.10 stable ?
>
> That is RHEL 7 kernel, right ?
Yes.
>
> After those patches get into upstream, I will try to port them to 3.10 stable.
Thanks very much!
>
> Thanks
>
> Yinghai
>
> .
>
--
Thanks!
Yijing
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