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Message-ID: <20150715234823.GT30412@codeaurora.org>
Date: Wed, 15 Jul 2015 16:48:23 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Gabriel Fernandez <gabriel.fernandez@...aro.org>
Cc: Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Srinivas Kandagatla <srinivas.kandagatla@...il.com>,
Maxime Coquelin <maxime.coquelin@...com>,
Patrice Chotard <patrice.chotard@...com>,
Russell King <linux@....linux.org.uk>,
Michael Turquette <mturquette@...libre.com>,
Peter Griffin <peter.griffin@...aro.org>,
Pankaj Dev <pankaj.dev@...com>,
Olivier Bideau <olivier.bideau@...com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Fabian Frederick <fabf@...net.be>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
kernel@...inux.com, linux-clk@...r.kernel.org
Subject: Re: [PATCH 1/3] drivers: clk: st: Support for enable/disable in
Clockgen PLLs
On 07/09, Gabriel Fernandez wrote:
> @@ -270,6 +285,73 @@ static int clkgen_pll_is_enabled(struct clk_hw *hw)
> return !poweroff;
> }
>
> +static int __clkgen_pll_enable(struct clk_hw *hw)
> +{
> + struct clkgen_pll *pll = to_clkgen_pll(hw);
> + unsigned long timeout;
> + int ret = 0;
> +
> + if (clkgen_pll_is_enabled(hw))
> + return 0;
> +
> + CLKGEN_WRITE(pll, pdn_ctrl, 0);
> +
> + timeout = jiffies + msecs_to_jiffies(10);
Jiffies isn't guaranteed to increment here because
.enable/.disable is called with irqs disabled and if this is the
only CPU running it won't be getting interrupts to update
jiffies.
> +
> + while (!clkgen_pll_is_locked(hw)) {
> + if (time_after(jiffies, timeout))
> + return -ETIMEDOUT;
> + cpu_relax();
> + }
> +
> + pr_debug("%s:%s enabled\n", __clk_get_name(hw->clk), __func__);
> +
> + return ret;
> +}
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
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