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Message-Id: <201507161944.20523.marex@denx.de>
Date:	Thu, 16 Jul 2015 19:44:20 +0200
From:	Marek Vasut <marex@...x.de>
To:	Cyrille Pitchen <cyrille.pitchen@...el.com>
Cc:	nicolas.ferre@...el.com, broonie@...nel.org,
	linux-spi@...r.kernel.org, dwmw2@...radead.org,
	computersforpeace@...il.com, zajec5@...il.com, beanhuo@...ron.com,
	juhosg@...nwrt.org, shijie.huang@...el.com, ben@...adent.org.uk,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, robh+dt@...nel.org, pawel.moll@....com,
	mark.rutland@....com, ijc+devicetree@...lion.org.uk,
	galak@...eaurora.org, linux-mtd@...ts.infradead.org
Subject: Re: [PATCH 4/7] Documentation: mtd: add a DT property to set the latency code of Spansion memory

On Thursday, July 16, 2015 at 05:27:51 PM, Cyrille Pitchen wrote:

Hi!

> Both the SPI controller and the NOR flash memory need to agree on the
> number of dummy cycles to use for Fast Read commands. For Spansion
> memories, this number of dummy cycles is not given directly but through a
> so called "latency code".
> The latency code can be found into the memory datasheet and depends on the
> SPI clock frequency, the Fast Read op code and the Single/Dual Data Rate
> mode.

Shouldn't you be able to derive the latency code from the above information,
which you already know then ?

Best regards,
Marek Vasut
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