linux-kernel - Re: [PATCH v2 7/7] ARM: atomics: define our SMP atomics in terms of

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Message-ID: <55A816A3.1000502@hp.com>
Date:	Thu, 16 Jul 2015 16:40:03 -0400
From:	Waiman Long <waiman.long@...com>
To:	Will Deacon <will.deacon@....com>
CC:	linux-arch@...r.kernel.org, peterz@...radead.org,
	linux-kernel@...r.kernel.org, paulmck@...ux.vnet.ibm.com
Subject: Re: [PATCH v2 7/7] ARM: atomics: define our SMP atomics in terms
 of _relaxed operations

On 07/16/2015 11:32 AM, Will Deacon wrote:
> By defining our SMP atomics in terms of relaxed operations, we gain
> a small reduction in code size and have acquire/release/fence variants
> generated automatically by the core code.
>
> Signed-off-by: Will Deacon<will.deacon@....com>
> ---
>   arch/arm/include/asm/atomic.h  | 37 ++++++++++++++-------------------
>   arch/arm/include/asm/cmpxchg.h | 47 +++++++-----------------------------------
>   2 files changed, 24 insertions(+), 60 deletions(-)
>
>
>
> -#define xchg(ptr, x) ({							\
> +#define xchg_relaxed(ptr, x) ({						\
>   	(__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr),		\
>   				   sizeof(*(ptr)));			\
>   })
> @@ -117,6 +115,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
>   #error "SMP is not supported on this platform"
>   #endif
>
> +#define xchg xchg_relaxed

Is that a typo? I think xchg() needs to be a full memory barrier.

Cheers,
Longman

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