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Message-ID: <alpine.DEB.2.02.1507160239370.32764@utopia.booyaka.com>
Date: Thu, 16 Jul 2015 02:40:09 +0000 (UTC)
From: Paul Walmsley <paul@...an.com>
To: Keerthy <j-keerthy@...com>
cc: tony@...mide.com, t-kristo@...com, linux-omap@...r.kernel.org,
linux-kernel@...r.kernel.org, bcousson@...libre.com,
galak@...eaurora.org, pawel.moll@....com
Subject: Re: [PATCH v2 4/6] ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2
and IRQSTATUS_MPU_2 register offsets
On Wed, 8 Jul 2015, Keerthy wrote:
> The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
> This makes it difficult to reuse the code for SoCs like AM437x that have
> a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
> Hence handling the case using offset of 4 to accommodate single set of IRQ*
> registers generically.
>
> Signed-off-by: Keerthy <j-keerthy@...com>
Thanks, queued for v4.3.
- Paul
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