linux-kernel - Re: [PATCH v9 0/7] FPGA Manager Framework and Simple FPGA Bus

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Fri, 17 Jul 2015 13:09:12 -0500
From:	atull <atull@...nsource.altera.com>
To:	Jason Gunthorpe <jgunthorpe@...idianresearch.com>
CC:	<gregkh@...uxfoundation.org>, <hpa@...or.com>, <monstr@...str.eu>,
	<michal.simek@...inx.com>, <rdunlap@...radead.org>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<pantelis.antoniou@...sulko.com>, <robh+dt@...nel.org>,
	<grant.likely@...aro.org>, <iws@...o.caltech.edu>,
	<linux-doc@...r.kernel.org>, <pavel@...x.de>, <broonie@...nel.org>,
	<philip@...ister.org>, <rubini@...dd.com>,
	<s.trumtrar@...gutronix.de>, <jason@...edaemon.net>,
	<kyle.teske@...com>, <nico@...aro.org>, <balbi@...com>,
	<m.chehab@...sung.com>, <davidb@...eaurora.org>, <rob@...dley.net>,
	<davem@...emloft.net>, <cesarb@...arb.net>,
	<sameo@...ux.intel.com>, <akpm@...ux-foundation.org>,
	<linus.walleij@...aro.org>, <pawel.moll@....com>,
	<mark.rutland@....com>, <ijc+devicetree@...lion.org.uk>,
	<galak@...eaurora.org>, <devel@...verdev.osuosl.org>,
	Petr Cvek <petr.cvek@....cz>, <delicious.quinoa@...il.com>,
	<dinguyen@...nsource.altera.com>
Subject: Re: [PATCH v9 0/7] FPGA Manager Framework and Simple FPGA Bus

On Fri, 17 Jul 2015, Jason Gunthorpe wrote:

> On Fri, Jul 17, 2015 at 10:51:10AM -0500, atull@...nsource.altera.com wrote:
> > From: Alan Tull <atull@...nsource.altera.com>
> > 
> > This patchset adds two chunks plus documentation:
> >  * fpga manager core: exports ABI functions that write an image to a FPGA
> >  * DT Overlay support: simple-fpga-bus to handle FPGA from a DT overlay
> 
> I didn't read super closely, but overall it makes sense to me..
> 
> Providing an in-kernel API will let someone else figure out how to
> expose that to user space. The DT based scheme seems pretty nice.
> 

Thanks!

> Can you use this without DT overlay? Ie if I provide the FGPA
> description as part of my boot time DT will it just work?

The simple fpga bus would need to defer probing until after the fpga 
manager driver and bridge drivers are probed (that's easy).  Since it is 
using firmware, it will also have to defer until the filesystem is 
available so it can get the fpga image to load.  I'll work on it.

Alan

> 
> Jason
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@...r.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/