linux-kernel - Re: [PATCH] x86, cpufeature: add feature bit for SDBG

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Message-ID: <20150720115405.GA8303@nazgul.tnic>
Date:	Mon, 20 Jul 2015 13:54:05 +0200
From:	Borislav Petkov <bp@...en8.de>
To:	Mathias Krause <minipli@...glemail.com>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org,
	x86@...nel.org
Subject: Re: [PATCH] x86, cpufeature: add feature bit for SDBG

On Sun, Jul 19, 2015 at 08:26:43PM +0200, Mathias Krause wrote:
> Add a CPUID feature bit for the SDBG (Silicon Debug) CPU feature found
> on recent Intel systems starting with Haswell.
> 
> Using the IA32_DEBUG_INTERFACE MSR (index C80H) one can at least detect
> if SDBG has been enabled by the firmware and if it has been used or not.
> 
> Signed-off-by: Mathias Krause <minipli@...glemail.com>
> Cc: Borislav Petkov <bp@...en8.de>
> Cc: H. Peter Anvin <hpa@...or.com>
> Cc: Ingo Molnar <mingo@...hat.com>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> ---
>  arch/x86/include/asm/cpufeature.h |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index 3d6606fb97d0..4b11974b4ea7 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -119,6 +119,7 @@
>  #define X86_FEATURE_TM2		( 4*32+ 8) /* Thermal Monitor 2 */
>  #define X86_FEATURE_SSSE3	( 4*32+ 9) /* Supplemental SSE-3 */
>  #define X86_FEATURE_CID		( 4*32+10) /* Context ID */
> +#define X86_FEATURE_SDBG	( 4*32+11) /* Silicon Debug */
>  #define X86_FEATURE_FMA		( 4*32+12) /* Fused multiply-add */
>  #define X86_FEATURE_CX16	( 4*32+13) /* CMPXCHG16B */
>  #define X86_FEATURE_XTPR	( 4*32+14) /* Send Task Priority Messages */

Acked-by: Borislav Petkov <bp@...e.de>

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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