linux-kernel - Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to SATA PHY

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Message-ID: <55ACE4B5.7000107@ti.com>
Date:	Mon, 20 Jul 2015 15:08:21 +0300
From:	Tero Kristo <t-kristo@...com>
To:	Roger Quadros <rogerq@...com>, <kishon@...com>, <tony@...mide.com>
CC:	<nm@...com>, <nsekhar@...com>, <balbi@...com>,
	<grygorii.strashko@...com>, <linux-omap@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 2/3] ARM: dts: dra7: Add syscon-pllreset syscon to
 SATA PHY

On 07/17/2015 04:47 PM, Roger Quadros wrote:
> This register is required to be passed to the SATA PHY driver
> to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock).
>
> Signed-off-by: Roger Quadros <rogerq@...com>
> ---
>   arch/arm/boot/dts/dra7.dtsi | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
> index 8f1e25b..4a0718c 100644
> --- a/arch/arm/boot/dts/dra7.dtsi
> +++ b/arch/arm/boot/dts/dra7.dtsi
> @@ -1140,6 +1140,7 @@
>   				ctrl-module = <&omap_control_sata>;
>   				clocks = <&sys_clkin1>, <&sata_ref_clk>;
>   				clock-names = "sysclk", "refclk";
> +				syscon-pllreset = <&scm_conf 0x3fc>;
>   				#phy-cells = <0>;
>   			};
>
>

Looks fine to me.

Make sure you use this register via regmap_update_bits only, seeing 
there is another potential user for the same register.

-Tero
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