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Message-ID: <87egk0gjej.fsf@eliezer.anholt.net>
Date:	Wed, 22 Jul 2015 11:02:44 -0700
From:	Eric Anholt <eric@...olt.net>
To:	Stephen Warren <swarren@...dotorg.org>
Cc:	linux-arm-kernel@...ts.infradead.org,
	linux-rpi-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Lee Jones <lee@...nel.org>, devicetree@...r.kernel.org,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Andrea Merello <andrea.merello@...il.com>
Subject: Re: [PATCH v2 4/4] irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2.

Stephen Warren <swarren@...dotorg.org> writes:

> On 07/13/2015 07:35 PM, Eric Anholt wrote:
>> This interrupt controller is the new root interrupt controller with
>> the timer, PMU events, and IPIs, and the bcm2835's interrupt
>> controller is chained off of it to handle the peripherals.
>
>> diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c
>
>> +static void bcm2836_arm_irqchip_mask_pmu_irq(struct irq_data *d)
>> +{
>> +	pr_err("%d: mask PMU\n", smp_processor_id());
>> +	writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_CLR);
>> +}
>> +
>> +static void bcm2836_arm_irqchip_unmask_pmu_irq(struct irq_data *d)
>> +{
>> +	pr_err("%d: unmask PMU\n", smp_processor_id());
>> +	writel(1 << smp_processor_id(), intc.base + LOCAL_PM_ROUTING_SET);
>> +}
>
> Are those pr_err() calls left-over debug, or is there some reason it's
> an error to call those functions?

Yeah, I was trying to figure out whether the PMU bits worked.  We're
failing before the point of IRQ probe, though (I don't see anything that
would set arm_pmu->supported_cpus for us).

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