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Message-Id: <1437612483-30160-3-git-send-email-sre@kernel.org>
Date:	Thu, 23 Jul 2015 02:48:02 +0200
From:	Sebastian Reichel <sre@...nel.org>
To:	Tony Lindgren <tony@...mide.com>,
	Russell King <rmk+kernel@....linux.org.uk>
Cc:	linux-arm-kernel@...ts.infradead.org, linux-omap@...r.kernel.org,
	linux-kernel@...r.kernel.org, Sebastian Reichel <sre@...nel.org>
Subject: [PATCH 2/3] ARM: update errata 430973 documentation

The Errata 430973 workaround config option only enables the
IBE bit, which should be done by the bootloader if possible.

Signed-off-by: Sebastian Reichel <sre@...nel.org>
---
 arch/arm/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1c50210..0e4929b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1078,6 +1078,10 @@ config ARM_ERRATA_430973
 	  and also flushes the branch target cache at every context switch.
 	  Note that setting specific bits in the ACTLR register may not be
 	  available in non-secure mode.
+	  Instead of enabling this option, it is recommended to enable the
+	  workaround by setting the IBE bit from the bootloader, since the
+	  BTB/BTAC operations are always executed for context switches on
+	  Cortex-A8.
 
 config ARM_ERRATA_458693
 	bool "ARM errata: Processor deadlock when a false hazard is created"
-- 
2.1.4

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