linux-kernel - [PATCH 1/5] x86/entry/32: Clean up enable_sep

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Message-Id: <dd0e00a1ca7f2a1396f6fb16abe1690c4bb748bd.1437665045.git.luto@kernel.org>
Date:	Thu, 23 Jul 2015 08:31:39 -0700
From:	Andy Lutomirski <luto@...nel.org>
To:	X86 ML <x86@...nel.org>, linux-kernel@...r.kernel.org
Cc:	Steven Rostedt <rostedt@...dmis.org>, Willy Tarreau <w@....eu>,
	Borislav Petkov <bp@...en8.de>,
	Thomas Gleixner <tglx@...utronix.de>,
	Peter Zijlstra <peterz@...radead.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Andy Lutomirski <luto@...nel.org>
Subject: [PATCH 1/5] x86/entry/32: Clean up enable_sep_cpu to prepare for 64-bit merge

Switch from wrmsr to wrmsrl_safe to prepare to merge the 32-bit and
64-bit code, and use __KERNEL_CS explicitly to initialize
MSR_IA32_SYSENTER_CS.  While we're at it, tweak the whitespace a
bit.

Signed-off-by: Andy Lutomirski <luto@...nel.org>
---
 arch/x86/kernel/cpu/common.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 922c5e0cea4c..9b3a43583f81 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1001,15 +1001,13 @@ void enable_sep_cpu(void)
 	 * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field --
 	 * see the big comment in struct x86_hw_tss's definition.
 	 */
-
 	tss->x86_tss.ss1 = __KERNEL_CS;
-	wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
-
-	wrmsr(MSR_IA32_SYSENTER_ESP,
-	      (unsigned long)tss + offsetofend(struct tss_struct, SYSENTER_stack),
-	      0);
 
-	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
+	wrmsrl_safe(MSR_IA32_SYSENTER_CS, __KERNEL_CS);
+	wrmsrl_safe(MSR_IA32_SYSENTER_ESP,
+		    (unsigned long)tss +
+		    offsetofend(struct tss_struct, SYSENTER_stack));
+	wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32);
 
 out:
 	put_cpu();
-- 
2.4.3

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