linux-kernel - Re: [PATCH] x86, pat: Add comments to cachemode translation tables

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Thu, 23 Jul 2015 09:38:49 -0600
From:	Toshi Kani <toshi.kani@...com>
To:	Jan Beulich <JBeulich@...e.com>
Cc:	peterz@...radead.org, mingo@...nel.org, x86@...nel.org,
	tglx@...utronix.de, bp@...e.de, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86, pat: Add comments to cachemode translation tables

On Thu, 2015-07-23 at 09:36 -0600, Jan Beulich wrote:
> > 
> > > > On 23.07.15 at 17:25, <toshi.kani@...com> wrote:
> > Yes, I agree with you.  But such risk is very low -- 1) the regular 
> > case
> > (no fallback) is used most of the cases, 2) the code using WT knows 
> > what
> > type of memory it is dealing with.  For example, pmem may map NVDIMM 
> > with
> > WT, and any sane BIOS sets MTRR to WB for NVDIMM. 
> 
> Do the words "sane" and "BIOS" really fit together in your opinion?

:-)

Anyway, I am not disagreeing with you... When UC is ready for both regular
memory and IO memory, it should be changed to fall back to UC.

Thanks,
-Toshi
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/