lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 23 Jul 2015 09:45:29 -0700
From:	Andy Lutomirski <luto@...capital.net>
To:	Steven Rostedt <rostedt@...dmis.org>
Cc:	Andy Lutomirski <luto@...nel.org>, X86 ML <x86@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Willy Tarreau <w@....eu>, Borislav Petkov <bp@...en8.de>,
	Thomas Gleixner <tglx@...utronix.de>,
	Peter Zijlstra <peterz@...radead.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 3/5] x86/entry: Merge 32-bit and 64-bit sysenter setup code

On Thu, Jul 23, 2015 at 9:06 AM, Steven Rostedt <rostedt@...dmis.org> wrote:
> On Thu, 23 Jul 2015 08:31:41 -0700
> Andy Lutomirski <luto@...nel.org> wrote:
>
>
>> -     if (!boot_cpu_has(X86_FEATURE_SEP))
>> +     /*
>> +      * On 64-bit CPUs, enable SEP unconditionally.  On Intel CPUs,
>> +      * it works and we use it.  On AMD CPUs, the MSRs exist but EIP
>> +      * is truncated to 32 bits.  This doesn't matter because AMD
>> +      * CPUs disallow SYSENTER in long mode.  If AMD ever decides to
>> +      * support SYSENTER, then they'll have to fix the truncation
>> +      * issue, and this code will work as-is.
>> +      */
>> +
>> +     if (IS_ENABLED(CONFIG_X86_32) && !boot_cpu_has(X86_FEATURE_SEP))
>>               goto out;
>>
>> +#ifdef CONFIG_X86_32
>>       /*
>>        * We cache MSR_IA32_SYSENTER_CS's value in the TSS's ss1 field --
>>        * see the big comment in struct x86_hw_tss's definition.
>>        */
>>       tss->x86_tss.ss1 = __KERNEL_CS;
>> +#endif
>>
>>       wrmsrl_safe(MSR_IA32_SYSENTER_CS, __KERNEL_CS);
>>       wrmsrl_safe(MSR_IA32_SYSENTER_ESP,
>>                   (unsigned long)tss +
>>                   offsetofend(struct tss_struct, SYSENTER_stack));
>> +#ifdef CONFIG_X86_32
>>       wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32);
>> +#else
>> +     wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_compat);
>> +#endif
>
> As an additional clean up, what impact would we have to just rename
> entry_SYSENTER_compat to entry_SYSENTER_32 on x86_64? It would remove
> the need for the above #ifdef logic.

I asked Ingo that at one point.  I bet that, if we can get the ABIs to
match, then we can do that.

--Andy
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ