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Message-ID: <CAMzpN2g8J=xx0FMnU9xqQLm2Tv9T7A_WssPh6SVx_BNsAEEPGg@mail.gmail.com>
Date:	Thu, 23 Jul 2015 13:27:32 -0400
From:	Brian Gerst <brgerst@...il.com>
To:	Andy Lutomirski <luto@...capital.net>
Cc:	Steven Rostedt <rostedt@...dmis.org>,
	Andy Lutomirski <luto@...nel.org>, X86 ML <x86@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Willy Tarreau <w@....eu>, Borislav Petkov <bp@...en8.de>,
	Thomas Gleixner <tglx@...utronix.de>,
	Peter Zijlstra <peterz@...radead.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 1/5] x86/entry/32: Clean up enable_sep_cpu to prepare for
 64-bit merge

On Thu, Jul 23, 2015 at 12:02 PM, Andy Lutomirski <luto@...capital.net> wrote:
> On Thu, Jul 23, 2015 at 8:56 AM, Steven Rostedt <rostedt@...dmis.org> wrote:
>> On Thu, 23 Jul 2015 08:31:39 -0700
>> Andy Lutomirski <luto@...nel.org> wrote:
>>
>>> Switch from wrmsr to wrmsrl_safe to prepare to merge the 32-bit and
>>> 64-bit code, and use __KERNEL_CS explicitly to initialize
>>> MSR_IA32_SYSENTER_CS.  While we're at it, tweak the whitespace a
>>> bit.
>>
>> Saying "prepare to merge the 32-bit and 64-bit" isn't that informative
>> to why this patch is needed. Can you please describe in the change log
>> what can fault with the wrmsr call, when we do the merge?
>
> Oh...
>
> Nothing can fault in the wrmsr as far as I know, but maybe there's a
> CPU out there that advertises SEP but doesn't have the MSRs.
>
> Ingo, Thomas, want a v2 that explains that the wrmsr_safe is there for
> consistency but that I don't know why 32bit does it?  Another option
> would be to remove the _safe from the 32-bit version.

There is an erratum with SEP being advertised but not available on
early P6 models, but we already check for that in the cpu setup code.
There shouldn't be a problem with a fault.

--
Brian Gerst
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