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Message-ID: <CA+55aFzhf7uGw_Mf_WMS-FH9236-Q-A13zfiVpLZqUKrVRYY=A@mail.gmail.com>
Date: Fri, 24 Jul 2015 11:41:55 -0700
From: Linus Torvalds <torvalds@...ux-foundation.org>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Willy Tarreau <w@....eu>, Steven Rostedt <rostedt@...dmis.org>,
Andy Lutomirski <luto@...capital.net>, X86 ML <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Borislav Petkov <bp@...en8.de>,
Thomas Gleixner <tglx@...utronix.de>,
Brian Gerst <brgerst@...il.com>
Subject: Re: Dealing with the NMI mess
On Fri, Jul 24, 2015 at 11:29 AM, Linus Torvalds
<torvalds@...ux-foundation.org> wrote:
>
> So in the #DB handler, we would basically only clear instruction
> breakpoints, and only when they trigger. If we have a data breakpoint
> that triggers (even in kernel mode, and with interrupts disabled), let
> it trigger and return with "ret" anyway. No biggie.
So we'd not only look at "which breakpoint triggered", we'd also look
at the actual debug register and check that "R/Wn == 0", and only
disable it for that case.
So you'd read %dr6 and %dr7, and then iterate 0..3 and check whether
it triggerd (bit #n in %dr6), and that R/Wn (bits 16-17+n*4 of %dr7)
is zero, and if so, clear LGn bits (bits 0-1+n*2) in %dr7.
Something like
unsigned long mask = 0;
unsigned int dr6 = debug_read(6);
unsigned int dr7 = debug_read(7)
int i;
for (i = 0; i < 4; i++) {
if ((dr6 >> i) & 1) {
if (!((dr7 >> (4*i+16)) & 3))
mask |= 3 << (i*2);
}
}
if (mask)
debug_write(dr7 & ~mask, 7);
(yeah, I could easily have screwed that up)
But the above should only clear bits in dr7 that are actually
associated with the instruction breakpoint that triggered, and since
it's a _kernel_ instruction breakpoint, not a user one, we can clear
it and forget it. No need to re-enable at all.
Hmm?
Linus
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