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Message-ID: <20150727102106.GD3358@arm.com>
Date: Mon, 27 Jul 2015 11:21:07 +0100
From: Will Deacon <will.deacon@....com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>,
"Waiman.Long@...com" <Waiman.Long@...com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"paulmck@...ux.vnet.ibm.com" <paulmck@...ux.vnet.ibm.com>
Subject: Re: [PATCH v3 1/8] atomics: add acquire/release/relaxed variants of
some atomic operations
On Mon, Jul 27, 2015 at 10:14:30AM +0100, Peter Zijlstra wrote:
> On Fri, Jul 24, 2015 at 03:04:34PM +0100, Will Deacon wrote:
> > This patch introduces three new ordering semantics for these operations:
> >
> > - *_relaxed: No ordering guarantees. This is similar to what we have
> > already for the non-return atomics (e.g. atomic_add).
> >
> > - *_acquire: ACQUIRE semantics, similar to smp_load_acquire.
> >
> > - *_release: RELEASE semantics, similar to smp_store_release.
>
> Do we want to further specify that for the RmW operations the Read/load
> will provide the acquire and the Write/store the release?
Yeah, that's not a bad idea, but if we add that then I probably need to
re-iterate the cmpxchg strangeness since a failed cmpxchg_acquire would
still not have barrier semantics with the current implementation even though
it must have performed a Read/load access.
Will
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