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Message-ID: <20150727102245.GC29945@e104818-lin.cambridge.arm.com>
Date: Mon, 27 Jul 2015 11:22:45 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: "Zhang, Jonathan Zhixiong" <zjzhang@...eaurora.org>
Cc: Will Deacon <Will.Deacon@....com>,
"fu.wei@...aro.org" <fu.wei@...aro.org>,
"al.stone@...aro.org" <al.stone@...aro.org>,
"bp @ alien8 . de Matt Fleming" <matt.fleming@...el.com>,
"rjw@...ysocki.net" <rjw@...ysocki.net>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linaro-acpi@...ts.linaro.org" <linaro-acpi@...ts.linaro.org>
Subject: Re: [PATCH V7 3/5] arm64: mm: add PROT_DEVICE_nGnRnE and
PROT_NORMAL_WT
On Fri, Jul 24, 2015 at 08:02:44PM +0100, Zhang, Jonathan Zhixiong wrote:
> On 7/24/2015 9:15 AM, Catalin Marinas wrote:
> > On Tue, Jul 21, 2015 at 10:59:18PM +0100, Jonathan (Zhixiong) Zhang wrote:
> >> #define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
> >> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
> >> index 838266f5b056..23e265d732f8 100644
> >> --- a/arch/arm64/mm/proc.S
> >> +++ b/arch/arm64/mm/proc.S
> >> @@ -294,7 +294,7 @@ ENTRY(__cpu_setup)
> >> msr cpacr_el1, x0 // Enable FP/ASIMD
> >> msr mdscr_el1, xzr // Reset mdscr_el1
> >> /*
> >> - * Memory region attributes for LPAE:
> >> + * Memory region attributes for LPAE and EFI:
> >
> > LPAE refers to the page table format, the comment probably inherited
> > from arch/arm. EFI means a completely different thing, so please remove
> > it.
> Yes, it was inherited from arch/arm/mm/proc-v7-3level.S. I'll remove
> the change. That being said, the original statement is not totally
> accurate I think, so if you prefer, I could change it like following.
> - * Memory region attributes for LPAE:
> + * Set MAIR with memory region attributes:
The LPAE is not inaccurate, just superfluous (since that's the only
format supported by AArch64).
--
Catalin
--
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