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Message-ID: <7CFCFE83B8145347A1D424EC939F1C3C0148C95C@XAP-PVEXMBX01.xlnx.xilinx.com>
Date:	Mon, 27 Jul 2015 13:55:56 +0000
From:	Ranjit Abhimanyu Waghmode <ranjit.waghmode@...inx.com>
To:	Mark Brown <broonie@...nel.org>
CC:	Michal Simek <michals@...inx.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	"zajec5@...il.com" <zajec5@...il.com>,
	"marex@...x.de" <marex@...x.de>,
	"shijie.huang@...el.com" <shijie.huang@...el.com>,
	"juhosg@...nwrt.org" <juhosg@...nwrt.org>,
	"ben@...adent.org.uk" <ben@...adent.org.uk>,
	"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
	"linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Harini Katakam <harinik@...inx.com>,
	Punnaiah Choudary Kalluri <punnaia@...inx.com>,
	"ran27jit@...il.com" <ran27jit@...il.com>,
	"dwmw2@...radead.org" <dwmw2@...radead.org>,
	"computersforpeace@...il.com" <computersforpeace@...il.com>
Subject: RE: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support
 in Zynq MPSoC GQSPI controller

Hi Mark,

> -----Original Message-----
> From: Mark Brown [mailto:broonie@...nel.org]
> Sent: Friday, July 24, 2015 4:22 PM
> To: Ranjit Abhimanyu Waghmode
> Cc: Michal Simek; Soren Brinkmann; zajec5@...il.com; marex@...x.de;
> shijie.huang@...el.com; juhosg@...nwrt.org; ben@...adent.org.uk; linux-
> mtd@...ts.infradead.org; linux-spi@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; linux-kernel@...r.kernel.org; Harini Katakam;
> Punnaiah Choudary Kalluri; ran27jit@...il.com; dwmw2@...radead.org;
> computersforpeace@...il.com
> Subject: Re: [RFC PATCH 0/2] spi: add dual parallel & stacked mode support in
> Zynq MPSoC GQSPI controller
> 
> On Fri, Jul 24, 2015 at 10:42:35AM +0000, Ranjit Abhimanyu Waghmode wrote:
> 
> As I think you've been asked before please fix your mail client to word wrap
> within paragraphs so your mails are more legible.
> 

Sorry about this, I did some changes but it's kind of broken. Will fix this.

> > To support the dual parallel mode in this controller, following minor
> > things can be added to the driver.
> 
> > 1) Controller needs to know in which mode it is working, then it's
> > obvious to set the appropriate flag for the same
> > 2) There are more than one chip selects, so need to set the same
> >
> > So kindly suggest your view on the above request.
> 
> I'm not entirely sure what you're asking here from the point of view of SPI, sorry
> - what exactly are you requesting?  If you want to add support for new SPI bus
> modes please go ahead and do that, you need to clearly document what any
> new modes you're adding are so that other people can understand them.

Ok, my description was too short to get it completely.

For adding dual parallel mode support to current driver:
Are following points enough? Or do you want to suggest something better on top of it?

Driver:
1) Controller needs to know in which mode it is working.
2) As there are more than one chip selects, may need to add code for handling that as well.

MTD:
1) Adding TWO_FLASH support
2) Adding DATA_STRIPE support
3) For reading array size needs to be doubled.
4) Need to access even addresses. Basically address/2.

Please suggest your view on above points.

Regards,
Ranjit
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