lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <55B63EBB.7030306@roeck-us.net>
Date:	Mon, 27 Jul 2015 07:22:51 -0700
From:	Guenter Roeck <linux@...ck-us.net>
To:	Matt Fleming <matt@...eblueprint.co.uk>,
	Wim Van Sebroeck <wim@...ana.be>
CC:	linux-kernel@...r.kernel.org, linux-watchdog@...r.kernel.org,
	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Jean Delvare <jdelvare@...e.com>,
	Wolfram Sang <wsa@...-dreams.de>,
	Matt Fleming <matt.fleming@...el.com>
Subject: Re: [PATCH 3/5] iTCO_wdt: Add support for TCO on Intel Sunrisepoint

On 07/27/2015 06:38 AM, Matt Fleming wrote:
> From: Matt Fleming <matt.fleming@...el.com>
>
> The revision of the watchdog hardware in Sunrisepoint necessitates a new
> "version" inside the TCO watchdog driver because some of the register
> layouts have changed.
>
> Cc: Wim Van Sebroeck <wim@...ana.be>
> Signed-off-by: Matt Fleming <matt.fleming@...el.com>
> ---
>   drivers/watchdog/iTCO_wdt.c | 58 ++++++++++++++++++++++++++-------------------
>   1 file changed, 34 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c
> index 9a6e70976f64..17dfbc51b85a 100644
> --- a/drivers/watchdog/iTCO_wdt.c
> +++ b/drivers/watchdog/iTCO_wdt.c
> @@ -145,58 +145,65 @@ static inline unsigned int ticks_to_seconds(int ticks)
>   	return iTCO_wdt_private.iTCO_version == 3 ? ticks : (ticks * 6) / 10;
>   }
>
> +static inline u32 no_reboot_bit(void)
> +{
> +	u32 enable_bit;
> +
> +	switch (iTCO_wdt_private.iTCO_version) {
> +	case 3:
> +		enable_bit = 0x00000010;
> +		break;
> +	case 2:
> +		enable_bit = 0x00000020;
> +		break;
> +	default:
> +		enable_bit = 0x00000002;

I think it would be better to explicitly list versions 1 and 4 here,
for clarification. We don't know what Intel will come up with for version 5,
and by then no one will remember that bit 2 applies for version 1 and 4 only.

Thanks,
Guenter

> +		break;
> +	}
> +
> +	return enable_bit;
> +}
> +
>   static void iTCO_wdt_set_NO_REBOOT_bit(void)
>   {
>   	u32 val32;
>
>   	/* Set the NO_REBOOT bit: this disables reboots */
> -	if (iTCO_wdt_private.iTCO_version == 3) {
> -		val32 = readl(iTCO_wdt_private.gcs_pmc);
> -		val32 |= 0x00000010;
> -		writel(val32, iTCO_wdt_private.gcs_pmc);
> -	} else if (iTCO_wdt_private.iTCO_version == 2) {
> +	if (iTCO_wdt_private.iTCO_version >= 2) {
>   		val32 = readl(iTCO_wdt_private.gcs_pmc);
> -		val32 |= 0x00000020;
> +		val32 |= no_reboot_bit();
>   		writel(val32, iTCO_wdt_private.gcs_pmc);
>   	} else if (iTCO_wdt_private.iTCO_version == 1) {
>   		pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
> -		val32 |= 0x00000002;
> +		val32 |= no_reboot_bit();
>   		pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
>   	}
>   }
>
>   static int iTCO_wdt_unset_NO_REBOOT_bit(void)
>   {
> +	u32 enable_bit = no_reboot_bit();
>   	int ret = 0;
> -	u32 val32;
> +	u32 val32 = 0;
>
>   	/* Unset the NO_REBOOT bit: this enables reboots */
> -	if (iTCO_wdt_private.iTCO_version == 3) {
> -		val32 = readl(iTCO_wdt_private.gcs_pmc);
> -		val32 &= 0xffffffef;
> -		writel(val32, iTCO_wdt_private.gcs_pmc);
> -
> -		val32 = readl(iTCO_wdt_private.gcs_pmc);
> -		if (val32 & 0x00000010)
> -			ret = -EIO;
> -	} else if (iTCO_wdt_private.iTCO_version == 2) {
> +	if (iTCO_wdt_private.iTCO_version >= 2) {
>   		val32 = readl(iTCO_wdt_private.gcs_pmc);
> -		val32 &= 0xffffffdf;
> +		val32 &= ~enable_bit;
>   		writel(val32, iTCO_wdt_private.gcs_pmc);
>
>   		val32 = readl(iTCO_wdt_private.gcs_pmc);
> -		if (val32 & 0x00000020)
> -			ret = -EIO;
>   	} else if (iTCO_wdt_private.iTCO_version == 1) {
>   		pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
> -		val32 &= 0xfffffffd;
> +		val32 &= ~enable_bit;
>   		pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
>
>   		pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
> -		if (val32 & 0x00000002)
> -			ret = -EIO;
>   	}
>
> +	if (val32 & enable_bit)
> +		ret = -EIO;
> +
>   	return ret; /* returns: 0 = OK, -EIO = Error */
>   }
>
> @@ -503,7 +510,10 @@ static int iTCO_wdt_probe(struct platform_device *dev)
>   		pdata->name, pdata->iTCO_version, (u64)TCOBASE);
>
>   	/* Clear out the (probably old) status */
> -	if (iTCO_wdt_private.iTCO_version == 3) {
> +	if (iTCO_wdt_private.iTCO_version == 4) {
> +		outw(0x0008, TCO1_STS);	/* Clear the Time Out Status bit */
> +		outw(0x0002, TCO2_STS);	/* Clear SECOND_TO_STS bit */
> +	} else if (iTCO_wdt_private.iTCO_version == 3) {
>   		outl(0x20008, TCO1_STS);
>   	} else {
>   		outw(0x0008, TCO1_STS);	/* Clear the Time Out Status bit */
>

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ