linux-kernel - Re: [PATCH v3 5/6] iommu/mediatek: Add mt8173 IOMMU driver

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Message-ID: <20150727154830.GK3358@arm.com>
Date:	Mon, 27 Jul 2015 16:48:31 +0100
From:	Will Deacon <will.deacon@....com>
To:	Yong Wu <yong.wu@...iatek.com>
Cc:	Joerg Roedel <joro@...tes.org>,
	Thierry Reding <treding@...dia.com>,
	Mark Rutland <Mark.Rutland@....com>,
	Matthias Brugger <matthias.bgg@...il.com>,
	Robin Murphy <Robin.Murphy@....com>,
	Daniel Kurtz <djkurtz@...gle.com>,
	Tomasz Figa <tfiga@...gle.com>,
	Lucas Stach <l.stach@...gutronix.de>,
	Rob Herring <robh+dt@...nel.org>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"linux-mediatek@...ts.infradead.org" 
	<linux-mediatek@...ts.infradead.org>,
	Sasha Hauer <kernel@...gutronix.de>,
	"srv_heupstream@...iatek.com" <srv_heupstream@...iatek.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
	"pebolle@...cali.nl" <pebolle@...cali.nl>,
	"arnd@...db.de" <arnd@...db.de>,
	"mitchelh@...eaurora.org" <mitchelh@...eaurora.org>,
	"cloud.chou@...iatek.com" <cloud.chou@...iatek.com>,
	"frederic.chen@...iatek.com" <frederic.chen@...iatek.com>
Subject: Re: [PATCH v3 5/6] iommu/mediatek: Add mt8173 IOMMU driver

On Mon, Jul 27, 2015 at 05:24:31AM +0100, Yong Wu wrote:
> On Fri, 2015-07-24 at 17:55 +0100, Will Deacon wrote:
> > On Fri, Jul 24, 2015 at 06:43:13AM +0100, Yong Wu wrote:
> > > On Tue, 2015-07-21 at 15:59 +0100, Will Deacon wrote:
> > > > On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> > > > > +static void mtk_iommu_tlb_flush_all(void *cookie)
> > > > > +{
> > > > > +       struct mtk_iommu_domain *domain = cookie;
> > > > > +       void __iomem *base;
> > > > > +
> > > > > +       base = domain->data->base;
> > > > > +       writel(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
> > > > > +       writel(F_ALL_INVLD, base + REG_MMU_INVALIDATE);
> > > > 
> > > > This needs to be synchronous, so you probably want to call
> > > > mtk_iommu_tlb_sync at the end.
> > > 
> > > From our spec, we have to wait until HW done after tlb flush range.
> > > But it don't need wait after tlb flush all.
> > > so It isn't necessary to add mtk_iommu_tlb_sync in tlb_flush_all here.
> > 
> > Okey doke, but I'm surprised you don't need a subsequent DSB or read-back.
> > What if the writel is buffered on the way to the IOMMU?
> 
> Then I change to this:
>  //==========
>     writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
>     writel_relaxed(F_ALL_INVLD, base + REG_MMU_INVALIDATE);    
>     dsb(ishst);
> //===========
>     dsb or mb(). which one is better here?

I think you should use mb();

Will
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