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Message-ID: <alpine.DEB.2.10.1507281507390.2449@vshiva-Udesk>
Date:	Tue, 28 Jul 2015 15:08:19 -0700 (PDT)
From:	Vikas Shivappa <vikas.shivappa@...el.com>
To:	Peter Zijlstra <peterz@...radead.org>
cc:	Vikas Shivappa <vikas.shivappa@...ux.intel.com>,
	linux-kernel@...r.kernel.org, vikas.shivappa@...el.com,
	x86@...nel.org, hpa@...or.com, tglx@...utronix.de,
	mingo@...nel.org, tj@...nel.org, matt.fleming@...el.com,
	will.auld@...el.com, glenn.p.williamson@...el.com,
	kanaka.d.juvva@...el.com
Subject: Re: [PATCH 6/9] x86/intel_rdt: Add support for cache bit mask
 management



On Tue, 28 Jul 2015, Peter Zijlstra wrote:

> On Wed, Jul 01, 2015 at 03:21:07PM -0700, Vikas Shivappa wrote:
>> +static inline bool cbm_is_contiguous(unsigned long var)
>> +{
>> +	unsigned long maxcbm = MAX_CBM_LENGTH;
>> +	unsigned long first_bit, zero_bit;
>> +
>> +	if (!var)
>> +		return false;
>> +
>> +	first_bit = find_next_bit(&var, maxcbm, 0);
>
> We actually have: find_first_bit().

will fix

Thanks,
Vikas

>
>> +	zero_bit = find_next_zero_bit(&var, maxcbm, first_bit);
>> +
>> +	if (find_next_bit(&var, maxcbm, zero_bit) < maxcbm)
>> +		return false;
>> +
>> +	return true;
>> +}
>
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