linux-kernel - [PATCH 3.12 029/124] crypto: caam - fix RNG buffer cache alignment

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Message-Id: <babdcb2450ed843ec53c913aec21cc07f2d3a96f.1438076484.git.jslaby@suse.cz>
Date:	Tue, 28 Jul 2015 11:42:43 +0200
From:	Jiri Slaby <jslaby@...e.cz>
To:	stable@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org,
	Steve Cornelius <steve.cornelius@...escale.com>,
	Victoria Milhoan <vicki.milhoan@...escale.com>,
	Herbert Xu <herbert@...dor.apana.org.au>,
	Jiri Slaby <jslaby@...e.cz>
Subject: [PATCH 3.12 029/124] crypto: caam - fix RNG buffer cache alignment

From: Steve Cornelius <steve.cornelius@...escale.com>

3.12-stable review patch.  If anyone has any objections, please let me know.

===============

commit 412c98c1bef65fe7589f1300e93735d96130307c upstream.

The hwrng output buffers (2) are cast inside of a a struct (caam_rng_ctx)
allocated in one DMA-tagged region. While the kernel's heap allocator
should place the overall struct on a cacheline aligned boundary, the 2
buffers contained within may not necessarily align. Consenquently, the ends
of unaligned buffers may not fully flush, and if so, stale data will be left
behind, resulting in small repeating patterns.

This fix aligns the buffers inside the struct.

Note that not all of the data inside caam_rng_ctx necessarily needs to be
DMA-tagged, only the buffers themselves require this. However, a fix would
incur the expense of error-handling bloat in the case of allocation failure.

Signed-off-by: Steve Cornelius <steve.cornelius@...escale.com>
Signed-off-by: Victoria Milhoan <vicki.milhoan@...escale.com>
Signed-off-by: Herbert Xu <herbert@...dor.apana.org.au>
Signed-off-by: Jiri Slaby <jslaby@...e.cz>
---
 drivers/crypto/caam/caamrng.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c
index d1939a9539c0..04aefffb4dd9 100644
--- a/drivers/crypto/caam/caamrng.c
+++ b/drivers/crypto/caam/caamrng.c
@@ -56,7 +56,7 @@

 /* Buffer, its dma address and lock */
 struct buf_data {
-	u8 buf[RN_BUF_SIZE];
+	u8 buf[RN_BUF_SIZE] ____cacheline_aligned;
 	dma_addr_t addr;
 	struct completion filled;
 	u32 hw_desc[DESC_JOB_O_LEN];
-- 
2.4.6

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