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Message-ID: <CAL_JsqKw9LqqbkvjbU2L5t1pv-vYtCAvoQXtNj0nPTOeG_1d1w@mail.gmail.com>
Date: Tue, 28 Jul 2015 10:56:22 -0500
From: Rob Herring <robherring2@...il.com>
To: Alban Bedel <albeu@...e.fr>
Cc: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>,
Mark Brown <broonie@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] DEVICETREE: Misc fix for the AR7100 SPI controller binding
On Fri, Jul 3, 2015 at 3:14 AM, Alban Bedel <albeu@...e.fr> wrote:
> Fix the clocks property documentation and use lower case for
> hex values in the example.
>
> Signed-off-by: Alban Bedel <albeu@...e.fr>
Applied. Thanks.
Rob
> ---
> Documentation/devicetree/bindings/spi/spi-ath79.txt | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/spi-ath79.txt b/Documentation/devicetree/bindings/spi/spi-ath79.txt
> index f1ad9c3..9c696fa 100644
> --- a/Documentation/devicetree/bindings/spi/spi-ath79.txt
> +++ b/Documentation/devicetree/bindings/spi/spi-ath79.txt
> @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
> Required properties:
> - compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
> - reg: Base address and size of the controllers memory area
> -- clocks: phandle to the AHB clock.
> +- clocks: phandle of the AHB clock.
> - clock-names: has to be "ahb".
> - #address-cells: <1>, as required by generic SPI binding.
> - #size-cells: <0>, also as required by generic SPI binding.
> @@ -12,9 +12,9 @@ Child nodes as per the generic SPI binding.
>
> Example:
>
> - spi@...00000 {
> + spi@...00000 {
> compatible = "qca,ar9132-spi", "qca,ar7100-spi";
> - reg = <0x1F000000 0x10>;
> + reg = <0x1f000000 0x10>;
>
> clocks = <&pll 2>;
> clock-names = "ahb";
> --
> 2.0.0
>
--
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