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Message-Id: <1438215726-27452-10-git-send-email-alexandre.belloni@free-electrons.com>
Date: Thu, 30 Jul 2015 02:21:55 +0200
From: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
To: Nicolas Ferre <nicolas.ferre@...el.com>
Cc: Boris Brezillon <boris.brezillon@...e-electrons.com>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
Jean-Christophe Plagniol-Villard <plagnioj@...osoft.com>
Subject: [PATCH 09/20] ARM: at91/dt: at91sam9n12: use slow clock where necessary
The watchdog, the reset controller, the RTC and the shutdown controller
need the slow clock, add it where necessary.
Signed-off-by: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
---
Cc: Jean-Christophe Plagniol-Villard <plagnioj@...osoft.com>
arch/arm/boot/dts/at91sam9n12.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 5c2a8c8c8bd4..b1c2f52dea05 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -376,6 +376,7 @@
rstc@...ffe00 {
compatible = "atmel,at91sam9g45-rstc";
reg = <0xfffffe00 0x10>;
+ clocks = <&clk32k>;
};
pit: timer@...ffe30 {
@@ -388,6 +389,7 @@
shdwc@...ffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
+ clocks = <&clk32k>;
};
sckc@...ffe50 {
@@ -891,6 +893,7 @@
compatible = "atmel,at91sam9260-wdt";
reg = <0xfffffe40 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&clk32k>;
atmel,watchdog-type = "hardware";
atmel,reset-type = "all";
atmel,dbg-halt;
@@ -901,6 +904,7 @@
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffeb0 0x40>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&clk32k>;
status = "disabled";
};
--
2.1.4
--
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