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Message-ID: <1438376591-22100-5-git-send-email-dinguyen@opensource.altera.com>
Date:	Fri, 31 Jul 2015 16:03:11 -0500
From:	<dinguyen@...nsource.altera.com>
To:	<p.zabel@...gutronix.de>
CC:	<dinh.linux@...il.com>, <robh+dt@...nel.org>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<mark.rutland@....com>, <pawel.moll@....com>,
	<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
	<s.trumtrar@...gutronix.de>,
	Dinh Nguyen <dinguyen@...nsource.altera.com>
Subject: [PATCHv2 4/4] ARM: socfpga: dts: Add resets for EMACs on Arria10

From: Dinh Nguyen <dinguyen@...nsource.altera.com>

Add the reset property for the EMAC controllers on Arria10.

Signed-off-by: Dinh Nguyen <dinguyen@...nsource.altera.com>
---
 arch/arm/boot/dts/socfpga_arria10.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 22e7d82..2340fcb 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -16,6 +16,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/altr,rst-mgr-a10.h>
 
 / {
 	#address-cells = <1>;
@@ -414,6 +415,8 @@
 			rx-fifo-depth = <16384>;
 			clocks = <&l4_mp_clk>;
 			clock-names = "stmmaceth";
+			resets = <&rst EMAC0_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 
@@ -431,6 +434,8 @@
 			rx-fifo-depth = <16384>;
 			clocks = <&l4_mp_clk>;
 			clock-names = "stmmaceth";
+			resets = <&rst EMAC1_RESET>;
+			reset-names = "stmmaceth";
 			status = "disabled";
 		};
 
-- 
2.4.5

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