linux-kernel - Re: [PATCH v3 3/6] iommu: add ARM short descriptor page table allocator.

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Message-ID: <20150731113217.GE29497@arm.com>
Date:	Fri, 31 Jul 2015 12:32:17 +0100
From:	Will Deacon <will.deacon@....com>
To:	Yong Wu <yong.wu@...iatek.com>
Cc:	Mark Rutland <Mark.Rutland@....com>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"cloud.chou@...iatek.com" <cloud.chou@...iatek.com>,
	Joerg Roedel <joro@...tes.org>,
	"frederic.chen@...iatek.com" <frederic.chen@...iatek.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"arnd@...db.de" <arnd@...db.de>, Tomasz Figa <tfiga@...gle.com>,
	Rob Herring <robh+dt@...nel.org>,
	"linux-mediatek@...ts.infradead.org" 
	<linux-mediatek@...ts.infradead.org>,
	Matthias Brugger <matthias.bgg@...il.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"pebolle@...cali.nl" <pebolle@...cali.nl>,
	Thierry Reding <treding@...dia.com>,
	"srv_heupstream@...iatek.com" <srv_heupstream@...iatek.com>,
	Robin Murphy <Robin.Murphy@....com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
	Daniel Kurtz <djkurtz@...gle.com>,
	Sasha Hauer <kernel@...gutronix.de>,
	"mitchelh@...eaurora.org" <mitchelh@...eaurora.org>,
	Lucas Stach <l.stach@...gutronix.de>,
	"th.yang@...iatek.com" <th.yang@...iatek.com>,
	"youhua.li@...iatek.com" <youhua.li@...iatek.com>
Subject: Re: [PATCH v3 3/6] iommu: add ARM short descriptor page table
 allocator.

On Fri, Jul 31, 2015 at 08:55:37AM +0100, Yong Wu wrote:
>     About the AP bits, I may have to add a new quirk for it...
> 
>   Current I add AP in pte like this:
> #define ARM_SHORT_PTE_RD_WR        (3 << 4)
> #define ARM_SHORT_PTE_RDONLY       BIT(9)
> 
> pteprot |=  ARM_SHORT_PTE_RD_WR;
> 
> 
>  If(!(prot & IOMMU_WRITE) && (prot & IOMMU_READ))
> 
> 
>       pteprot |= ARM_SHORT_PTE_RDONLY;
> 
> The problem is that the BIT(9) in the level1 and level2 pagetable of our
> HW has been used for PA[32] that is for the dram size over 4G.

Aha, now *thats* a case of page-table abuse!

> so I had to add a quirk to disable bit9 while RDONLY case.
> (If BIT9 isn't disabled, the HW treat it as the PA[32] case then it will
> translation fault..)
> 
> like: IO_PGTABLE_QUIRK_SHORT_MTK ?

Given that you don't have XN either, maybe IO_PGTABLE_QUIRK_NO_PERMS?
When set, IOMMU_READ/WRITE/EXEC are ignored and the mapping will never
generate a permission fault.

Will
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