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Message-ID: <tip-b1c599b8ff80ea79b9f8277a3f9f36a7b0cfedce@git.kernel.org>
Date: Fri, 31 Jul 2015 06:57:29 -0700
From: tip-bot for Mathias Krause <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: torvalds@...ux-foundation.org, aaron.lu@...el.com,
dirk.j.brandewie@...el.com, ross.zwisler@...ux.intel.com,
dave.hansen@...ux.intel.com, peterz@...radead.org,
josh@...htriplett.org, tglx@...utronix.de, bp@...e.de,
linux-kernel@...r.kernel.org, hpa@...or.com,
minipli@...glemail.com, mingo@...nel.org
Subject: [tip:x86/cpu] x86/cpufeature: Add feature bit for Intel'
s Silicon Debug CPUID bit
Commit-ID: b1c599b8ff80ea79b9f8277a3f9f36a7b0cfedce
Gitweb: http://git.kernel.org/tip/b1c599b8ff80ea79b9f8277a3f9f36a7b0cfedce
Author: Mathias Krause <minipli@...glemail.com>
AuthorDate: Fri, 24 Jul 2015 09:15:11 +0200
Committer: Ingo Molnar <mingo@...nel.org>
CommitDate: Fri, 31 Jul 2015 10:34:07 +0200
x86/cpufeature: Add feature bit for Intel's Silicon Debug CPUID bit
Add a CPUID feature bit for the SDBG (Silicon Debug) CPU feature
found on recent Intel systems starting with Haswell.
Using the IA32_DEBUG_INTERFACE MSR (index C80H) one can at least
detect if SDBG has been enabled by the firmware and if it has
been used or not.
Signed-off-by: Mathias Krause <minipli@...glemail.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: Aaron Lu <aaron.lu@...el.com>
Cc: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: Dirk Brandewie <dirk.j.brandewie@...el.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Josh Triplett <josh@...htriplett.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Ross Zwisler <ross.zwisler@...ux.intel.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Link: http://lkml.kernel.org/r/1437330403-12102-1-git-send-email-minipli@googlemail.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/include/asm/cpufeature.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 3d6606f..4b11974 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -119,6 +119,7 @@
#define X86_FEATURE_TM2 ( 4*32+ 8) /* Thermal Monitor 2 */
#define X86_FEATURE_SSSE3 ( 4*32+ 9) /* Supplemental SSE-3 */
#define X86_FEATURE_CID ( 4*32+10) /* Context ID */
+#define X86_FEATURE_SDBG ( 4*32+11) /* Silicon Debug */
#define X86_FEATURE_FMA ( 4*32+12) /* Fused multiply-add */
#define X86_FEATURE_CX16 ( 4*32+13) /* CMPXCHG16B */
#define X86_FEATURE_XTPR ( 4*32+14) /* Send Task Priority Messages */
--
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