linux-kernel - Re: [PATCH] x86: Clean up files of Intel Processor Trace

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Message-ID: <55C00F1F.9040007@jp.fujitsu.com>
Date:	Tue, 4 Aug 2015 10:02:23 +0900
From:	Takao Indoh <indou.takao@...fujitsu.com>
To:	<alexander.shishkin@...ux.intel.com>, <peterz@...radead.org>
CC:	<tglx@...utronix.de>, <mingo@...hat.com>, <hpa@...or.com>,
	<acme@...nel.org>, <linux-kernel@...r.kernel.org>, <x86@...nel.org>
Subject: Re: [PATCH] x86: Clean up files of Intel Processor Trace

On 2015/08/03 18:44, Alexander Shishkin wrote:
> On 3 August 2015 at 12:08, Peter Zijlstra <peterz@...radead.org> wrote:
>> On Mon, Aug 03, 2015 at 12:03:13PM +0300, Alexander Shishkin wrote:
>>> Takao Indoh <indou.takao@...fujitsu.com> writes:
>>
>>> Even though TOPA_SHIFT happens to be the same as PAGE_SHIFT, it is a
>>> property of a separate hardware block, not mmu. PAGE_SHIFT is 12, but
>>> 12 is not always PAGE_SHIFT.
>>
>> PAGE_SHIFT is _always_ 12 on x86. Changing that will require changing
>> the page table format, a rather unlikely thing to go happen.
> 
> Of course. Yet that doesn't justify turning every 12 into PAGE_SHIFT
> is what I'm saying.
> 
> Oh, look, it's PAGE_SHIFT o'clock on x86, time for lunch. :)

I thought the base address of output region is page aligned. I took a
look at Intel SDM again, it just says the base address is 4K-aligned
physical address, does not mention page size. So, logically TOPA_SHIFT
and PAGE_SHIFT are different things and I'll remove this change in next
version.

Thanks,
Takao Indoh

> 
> Regards,
> --
> Alex
> 


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