linux-kernel - [tip:perf/core] perf/x86/intel: Use 0x11 as extra reg test value

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Date:	Tue, 4 Aug 2015 02:00:32 -0700
From:	tip-bot for Andi Kleen <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	mingo@...nel.org, hpa@...or.com, torvalds@...ux-foundation.org,
	peterz@...radead.org, ak@...ux.intel.com, tglx@...utronix.de,
	linux-kernel@...r.kernel.org
Subject: [tip:perf/core] perf/x86/intel: Use 0x11 as extra reg test value

Commit-ID:  8c4fe7095d633dd5543690ea5c3d522c5cd989b6
Gitweb:     http://git.kernel.org/tip/8c4fe7095d633dd5543690ea5c3d522c5cd989b6
Author:     Andi Kleen <ak@...ux.intel.com>
AuthorDate: Tue, 30 Jun 2015 16:33:24 -0700
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Tue, 4 Aug 2015 10:16:59 +0200

perf/x86/intel: Use 0x11 as extra reg test value

The next patch adds a new perf extra register where 0x1ff is not a valid
value. Use 0x11 instead.

Signed-off-by: Andi Kleen <ak@...ux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Link: http://lkml.kernel.org/r/1435707205-6676-3-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/kernel/cpu/perf_event_intel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 28fc272..a478e3c 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -3579,7 +3579,7 @@ __init int intel_pmu_init(void)
 	 */
 	if (x86_pmu.extra_regs) {
 		for (er = x86_pmu.extra_regs; er->msr; er++) {
-			er->extra_msr_access = check_msr(er->msr, 0x1ffUL);
+			er->extra_msr_access = check_msr(er->msr, 0x11UL);
 			/* Disable LBR select mapping */
 			if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access)
 				x86_pmu.lbr_sel_map = NULL;
--
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