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Date: Tue, 4 Aug 2015 21:10:09 +0800 From: Xiao Guangrong <guangrong.xiao@...ux.intel.com> To: Paolo Bonzini <pbonzini@...hat.com> Cc: gleb@...nel.org, mtosatti@...hat.com, kvm@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH 6/9] KVM: MMU: introduce the framework to check reserved bits on sptes On 08/04/2015 08:14 PM, Paolo Bonzini wrote: > > > On 04/08/2015 12:59, Xiao Guangrong wrote: >> +/* >> + * the page table on host is the shadow page table for the page >> + * table in guest or amd nested guest, its mmu features completely >> + * follow the features in guest. >> + */ >> +void >> +reset_shadow_rsvds_bits_mask(struct kvm_vcpu *vcpu, struct kvm_mmu *context) >> +{ >> + __reset_rsvds_bits_mask(vcpu, &context->shadow_rsvd_check, >> + boot_cpu_data.x86_phys_bits, >> + context->shadow_root_level, context->nx, > > This should be cpu_has_nx, I think. cpu_has_nx() checks the feature on host CPU, however, this is the shadow page table which completely follow guest's features. E.g, if guest does not execution-protect the physical page, then KVM does not do it either. > >> + guest_cpuid_has_gbpages(vcpu), > > This should be cpu_has_gbpages. E.g, if guest does not use 1G page size, it's also not used in shadow page table. > >> is_pse(vcpu)); > > This should be cpu_has_pse. E.g, guest does no use 4M page size, then KVM does not use it either. BTW, cpu_pse only hurts 32 bit page table which is not used by shadow page table (32 PAE and 64 Long mode are used in shadow page). Only tdp only follows host CPU's features, KVM does not use NX to protect the page, so i always mark it as false in reset_tdp_shadow_rsvds_bits_mask(). -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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