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Date:	Fri, 7 Aug 2015 11:13:52 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Arnaldo Carvalho de Melo <acme@...nel.org>
Cc:	Max Filippov <jcmvbkbc@...il.com>, linux-xtensa@...ux-xtensa.org,
	linux-kernel@...r.kernel.org, Chris Zankel <chris@...kel.net>,
	Marc Gauthier <marc@...ence.com>,
	Paul Mackerras <paulus@...ba.org>,
	Ingo Molnar <mingo@...hat.com>
Subject: Re: [PATCH v2 07/13] xtensa: implement counting and sampling perf
 events

On Thu, Aug 06, 2015 at 04:46:32PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Sat, Jul 18, 2015 at 11:30:10AM +0300, Max Filippov escreveu:
> > Xtensa Performance Monitor Module has up to 8 32 bit wide performance
> > counters. Each counter may be enabled independently and can count any
> > single type of hardware performance events. Event counting may be enabled
> > and disabled globally (per PMM).
> > Each counter has status register with bits indicating if the counter has
> > been overflown and may be programmed to raise profiling IRQ on overflow.
> > This IRQ is used to rewind counters and allow for counting more than 2^32
> > samples for counting events and to report samples for sampling events.
> > 
> > For more details see Tensilica Debug User's Guide, chapter 8
> > "Performance monitor module".
> 
> Has this gone via PeterZ? I added the tools/ bits in my perf/core
> branch, will go in next pull req,

I was thinking it would go through the xtensa tree. Looks fine at a
quick glance and they can actually test it.
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