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Date:	Sat,  8 Aug 2015 00:36:19 -0700
From:	Kanaka Juvva <kanaka.d.juvva@...ux.intel.com>
To:	kanaka.d.juvva@...el.com, glenn.p.williamson@...el.com,
	matt.fleming@...el.com, will.auld@...el.com, andi@...stfloor.org,
	linux-kernel@...r.kernel.org, tony.luck@...el.com,
	peterz@...radead.org, tglx@...utronix.de, tj@...nel.org,
	x86@...nel.org, mingo@...hat.com, hpa@...or.com,
	vikas.shivappa@...el.com
Subject: [PATCH v3 2/2] perf,x86: skip intel_cqm_stable if CMT is not present in a CPU model

CMT and MBM are complementary technologies. One technology doesn't
imply the other technology. If CMT is not present in your CPU model
intel_cqm_stable() won't be called when computing a free RMID. This
is because, LLC_OCCUPANCY reading in this case doesn't apply and
shouldn't be used a criteria for freeing or picking an RMID.

Signed-off-by: Kanaka Juvva <kanaka.d.juvva@...ux.intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel_cqm.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_cqm.c b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
index 63eb68b..7aa3bc0 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_cqm.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_cqm.c
@@ -125,6 +125,7 @@ struct cqm_rmid_entry {
 	enum rmid_recycle_state state;
 	struct list_head list;
 	unsigned long queue_time;
+	bool config;
 };
 
 /*
@@ -232,6 +233,7 @@ static int intel_cqm_setup_rmid_cache(void)
 
 		INIT_LIST_HEAD(&entry->list);
 		entry->rmid = r;
+		entry->config = false;
 		cqm_rmid_ptrs[r] = entry;
 
 		list_add_tail(&entry->list, &cqm_rmid_free_lru);
@@ -568,7 +570,8 @@ static bool intel_cqm_rmid_stabilize(unsigned int *available)
 	/*
 	 * Test whether an RMID is free for each package.
 	 */
-	on_each_cpu_mask(&cqm_cpumask, intel_cqm_stable, NULL, true);
+	if (entry->config)
+		on_each_cpu_mask(&cqm_cpumask, intel_cqm_stable, NULL, true);
 
 	list_for_each_entry_safe(entry, tmp, &cqm_rmid_limbo_lru, list) {
 		/*
@@ -1003,6 +1006,12 @@ static void intel_cqm_event_start(struct perf_event *event, int mode)
 	}
 
 	state->rmid = rmid;
+	if (event->attr.config & QOS_L3_OCCUP_EVENT_ID) {
+		struct cqm_rmid_entry *entry;
+
+		entry = __rmid_entry(rmid);
+		entry->config = true;
+	}
 	wrmsr(MSR_IA32_PQR_ASSOC, rmid, state->closid);
 }
 
-- 
2.1.0

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