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Message-ID: <lsq.1439201550.749969465@decadent.org.uk>
Date: Mon, 10 Aug 2015 12:12:30 +0200
From: Ben Hutchings <ben@...adent.org.uk>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
CC: akpm@...ux-foundation.org, "Mark Brown" <broonie@...nel.org>,
"Axel Lin" <axel.lin@...ics.com>,
"Charles Keepax" <ckeepax@...nsource.wolfsonmicro.com>
Subject: [PATCH 3.2 008/110] ASoC: wm8955: Fix setting wrong register for
WM8955_K_8_0_MASK bits
3.2.71-rc1 review patch. If anyone has any objections, please let me know.
------------------
From: Axel Lin <axel.lin@...ics.com>
commit 12c350050538c7dc779c083b7342bfd20f74949c upstream.
WM8955_K_8_0_MASK bits is controlled by WM8955_PLL_CONTROL_3 rather than
WM8955_PLL_CONTROL_2.
Signed-off-by: Axel Lin <axel.lin@...ics.com>
Acked-by: Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@...nel.org>
Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
---
sound/soc/codecs/wm8955.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/sound/soc/codecs/wm8955.c
+++ b/sound/soc/codecs/wm8955.c
@@ -282,7 +282,7 @@ static int wm8955_configure_clocking(str
snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2,
WM8955_K_17_9_MASK,
(pll.k >> 9) & WM8955_K_17_9_MASK);
- snd_soc_update_bits(codec, WM8955_PLL_CONTROL_2,
+ snd_soc_update_bits(codec, WM8955_PLL_CONTROL_3,
WM8955_K_8_0_MASK,
pll.k & WM8955_K_8_0_MASK);
if (pll.k)
--
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