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Message-ID: <DB4PR02MB272D45ABADAF421FA8B149CD6700@DB4PR02MB272.eurprd02.prod.outlook.com>
Date:	Mon, 10 Aug 2015 19:13:39 +0000
From:	Noam Camus <noamc@...hip.com>
To:	Greg KH <greg@...ah.com>
CC:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>
Subject: Re: [v2 2/3] serial: 8250_dw: dw8250_setup_port() use endianness
 aware read.

From: Greg KH <greg@...ah.com>
Sent: Tuesday, August 4, 2015 2:42 AM

> > -     reg = readl(p->membase + DW_UART_CPR);
> > +     reg = (p->iotype == UPIO_MEM32BE) ?
> > +             ioread32be(p->membase + DW_UART_CPR) :
> > +             readl(p->membase + DW_UART_CPR);
>
> Same here.
>
> And shouldn't all of this be "hidden" behind something else?  You should
not have to do this for each readl call...
>

As I wrote for last patch, I will add another level for accessors and use it here.

Noam--
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