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Message-id: <55CBE6F2.9030405@samsung.com>
Date:	Thu, 13 Aug 2015 09:38:10 +0900
From:	Krzysztof Kozlowski <k.kozlowski@...sung.com>
To:	Alexis Ballier <aballier@...too.org>,
	linux-samsung-soc@...r.kernel.org
Cc:	linux-arm-kernel@...ts.infradead.org,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Russell King <linux@....linux.org.uk>,
	Kukjin Kim <kgene@...nel.org>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: dts: exynos4412-odroidu3: Enable SPI1.

On 12.08.2015 20:27, Alexis Ballier wrote:
> SPI1 is available on IO Port #2 (as depicted on their website) in
> PCB Revision 0.5 of Hardkernel Odroid U3 board.
> The shield connects a 256KiB spi-nor flash on that bus.
> 
> Signed-off-by: Alexis Ballier <aballier@...too.org>
> ---
>  arch/arm/boot/dts/exynos4412-odroidu3.dts | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/exynos4412-odroidu3.dts b/arch/arm/boot/dts/exynos4412-odroidu3.dts
> index 44684e5..37698e4 100644
> --- a/arch/arm/boot/dts/exynos4412-odroidu3.dts
> +++ b/arch/arm/boot/dts/exynos4412-odroidu3.dts
> @@ -61,3 +61,10 @@
>  		"Speakers", "SPKL",
>  		"Speakers", "SPKR";
>  };
> +
> +&spi_1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&spi1_bus>;
> +	cs-gpios = <&gpb 5 0>;

Please use GPIO_ACTIVE_HIGH.

Best regards,
Krzysztof

> +	status = "okay";
> +};
> 

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