linux-kernel - Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64.

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Message-ID: <20150818083127.GB10301@arm.com>
Date:	Tue, 18 Aug 2015 09:31:27 +0100
From:	Will Deacon <will.deacon@....com>
To:	"Zhang, Jonathan Zhixiong" <zjzhang@...eaurora.org>
Cc:	"fu.wei@...aro.org" <fu.wei@...aro.org>,
	"harba@...eaurora.org" <harba@...eaurora.org>,
	"linaro-acpi@...ts.linaro.org" <linaro-acpi@...ts.linaro.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"matt.fleming@...el.com" <matt.fleming@...el.com>,
	"tekkamanninja@...il.com" <tekkamanninja@...il.com>,
	"graeme.gregory@...aro.org" <graeme.gregory@...aro.org>,
	"al.stone@...aro.org" <al.stone@...aro.org>,
	"hanjun.guo@...aro.org" <hanjun.guo@...aro.org>,
	"jcm@...hat.com" <jcm@...hat.com>,
	Mark Rutland <Mark.Rutland@....com>,
	Catalin Marinas <Catalin.Marinas@....com>,
	"rjw@...ysocki.net" <rjw@...ysocki.net>,
	"bp@...en8.de" <bp@...en8.de>,
	Tomasz Nowicki <tomasz.nowicki@...aro.org>
Subject: Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64.

On Tue, Aug 18, 2015 at 12:19:13AM +0100, Zhang, Jonathan Zhixiong wrote:
> On 8/17/2015 3:01 AM, Will Deacon wrote:
> > On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu.wei@...aro.org wrote:
> >> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
> >> index a17b623..ced6e25 100644
> >> --- a/arch/arm64/include/asm/acpi.h
> >> +++ b/arch/arm64/include/asm/acpi.h
> >> @@ -22,6 +22,7 @@
> >>   #ifdef CONFIG_ACPI_APEI
> >>   #include <linux/efi.h>
> >>   #include <asm/pgtable.h>
> >> +#include <asm/tlbflush.h>
> >>   #endif
> >>
> >>   /* Macros for consistency checks of the GICC subtable of MADT */
> >> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t;
> >>   extern int acpi_disabled;
> >>   extern int acpi_noirq;
> >>   extern int acpi_pci_disabled;
> >> +#ifdef CONFIG_ACPI_APEI
> >> +extern int acpi_disable_cmcff;
> >> +#endif
> >>
> >>   static inline void disable_acpi(void)
> >>   {
> >> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void)
> >>   static inline void arch_fix_phys_package_id(int num, u32 slot) { }
> >>   void __init acpi_init_cpus(void);
> >>
> >> +#ifdef CONFIG_ACPI_APEI
> >> +static inline void arch_apei_flush_tlb_one(unsigned long addr)
> >> +{
> >> +	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
> >> +}
> >> +#endif
> >
> > Looking at the callers of this function, I suspect we could downgrade it
> > to a local CPU invalidation if we wanted. However, this isn't a hot-path
> > so it's fine to stay like it is for now.
> I suppose if we run "tlbi vae1" instead of "tlbi vae1is", it will be
> more efficient without side effect, since both ghes_ioremap_pfn_irq()
> and ghes_iounmap_irq() happen in same atomic context. However, today
> arch/arm64/include/asm/tlbflush.h does not have a function tailored for
> such performance optimization. Does it make sense to add a parameter to
> flush_tlb_kernel_range() to allow caller to make a choice?
>    static inline void flush_tlb_kernel_range(unsigned long start,
> 	unsigned long end, bool local)
> There are only two others callers of flush_tlb_kernel_range().

I've already got some patches to add things like local_flush_tlb_all,
which I'll post after the merge window (I'm currently rewriting a bunch
of the switch_mm code to try to reduce the TLBI traffic).

If this isn't a hotpath (I don't think it is), then it's probably not
worth making the optimisation without a system to benchmark it on.

Will
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