linux-kernel - Re: [PATCH] arm: Adding support for atomic half word exchange

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Message-ID: <20150819161301.GJ24062@e104818-lin.cambridge.arm.com>
Date:	Wed, 19 Aug 2015 17:13:01 +0100
From:	Catalin Marinas <catalin.marinas@....com>
To:	Sarbojit Ganguly <ganguly.s@...sung.com>
Cc:	sharan.allur@...sung.com, vikram.m@...sung.com,
	"tglx@...utronix.de" <tglx@...utronix.de>,
	"mingo@...hat.com" <mingo@...hat.com>,
	"peterz@...radead.org" <peterz@...radead.org>,
	"Waiman.Long@...com" <Waiman.Long@...com>,
	"oleg@...hat.com" <oleg@...hat.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"torvalds@...ux-foundation.org" <torvalds@...ux-foundation.org>,
	raghavendra.kt@...ux.vnet.ibm.com
Subject: Re: [PATCH] arm: Adding support for atomic half word exchange

On Tue, Aug 18, 2015 at 09:17:53AM +0100, Sarbojit Ganguly wrote:
> <Ping>
> 
> Since 16 bit half word exchange was not there and MCS based qspinlock by Waiman's xchg_tail() requires an atomic exchange on a half word, here is a small modification to __xchg() code to support the exchange.
> ARMv6 and lower does not have support for LDREXH, so we need to make sure things do not break when we're compiling on ARMv6.

First of all, please wrap the text appropriately.

Secondly, you need to cc the relevant maintainer and mailing list (try
running ./scripts/get_maintainer.pl on this patch to get some hints).

-- 
Catalin

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