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Message-ID: <20150819165009.GC10297@arm.com>
Date: Wed, 19 Aug 2015 17:50:09 +0100
From: Will Deacon <will.deacon@....com>
To: Jens Wiklander <jens.wiklander@...aro.org>
Cc: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Kees Cook <keescook@...omium.org>,
"valentin.manea@...wei.com" <valentin.manea@...wei.com>,
Mark Rutland <Mark.Rutland@....com>,
"javier@...igon.com" <javier@...igon.com>,
"emmanuel.michel@...com" <emmanuel.michel@...com>,
Michal Simek <michal.simek@...inx.com>,
"jean-michel.delorme@...com" <jean-michel.delorme@...com>,
Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH v5 1/5] arm/arm64: add smccc ARCH32
On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> Adds helpers to do SMC based on ARM SMC Calling Convention.
> CONFIG_HAVE_SMCCC is enabled for architectures that may support
> the SMC instruction. It's the responsibility of the caller to
> know if the SMC instruction is supported by the platform.
[...]
> diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S
> new file mode 100644
> index 0000000..3ce7fe8
> --- /dev/null
> +++ b/arch/arm64/kernel/smccc-call.S
> @@ -0,0 +1,34 @@
> +/*
> + * Copyright (c) 2015, Linaro Limited
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License Version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + */
> +#include <linux/linkage.h>
> +
> +#define SMC_PARAM_W0_OFFS 0
> +#define SMC_PARAM_W2_OFFS 8
> +#define SMC_PARAM_W4_OFFS 16
> +#define SMC_PARAM_W6_OFFS 24
> +
> +/* void smccc_call32(struct smccc_param32 *param) */
> +ENTRY(smccc_call32)
> + stp x28, x30, [sp, #-16]!
Why are you saving lr?
> + mov x28, x0
> + ldp w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> + ldp w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> + ldp w4, w5, [x28, #SMC_PARAM_W4_OFFS]
> + ldp w6, w7, [x28, #SMC_PARAM_W6_OFFS]
> + smc #0
> + stp w0, w1, [x28, #SMC_PARAM_W0_OFFS]
> + stp w2, w3, [x28, #SMC_PARAM_W2_OFFS]
> + ldp x28, x30, [sp], #16
> + ret
> +ENDPROC(smccc_call32)
Could we deal with this like we do for PSCI instead? (see
__invoke_psci_fn_smc). We could also then rename psci-call.S to fw-call.S
and stick this in there too.
Will
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