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Message-ID: <20150820104151.GA2567@codeblueprint.co.uk>
Date:	Thu, 20 Aug 2015 11:41:51 +0100
From:	Matt Fleming <matt@...eblueprint.co.uk>
To:	Kanaka Juvva <kanaka.d.juvva@...ux.intel.com>
Cc:	kanaka.d.juvva@...el.com, glenn.p.williamson@...el.com,
	matt.fleming@...el.com, will.auld@...el.com, andi@...stfloor.org,
	linux-kernel@...r.kernel.org, tony.luck@...el.com,
	peterz@...radead.org, tglx@...utronix.de, tj@...nel.org,
	x86@...nel.org, mingo@...hat.com, hpa@...or.com,
	vikas.shivappa@...el.com
Subject: Re: [PATCH v3 2/2] perf,x86: skip intel_cqm_stable if CMT is not
 present in a CPU model

On Tue, 18 Aug, at 06:09:01PM, Matt Fleming wrote:
> 
> You can only skip the stabilization if there are no CMT RMIDs on the
> limbo lru at all.

I need to provide a little more detail here...

There are actually 3 cases you need to consider when you make the MBM
changes to intel_cqm_rmid_stabilize(),

  1. RMIDs on the limbo lru are *only* CMT
  2. RMIDs on the limbo lru are *only* MBM
  3. RMIDs on the limbo lru are a mixture of CMT *and* MBM

Case 1 is exactly what is supported today and so that functionality
needs to remain unchanged. For case 2 you can completely skip the SMP IPI
stabilization and move all RMIDs from the limbo lru to the free lru,
which is similar in spirit to your patch.

Case 3 is by far the most interesting. The simplest way to handle it
is to skip any MBM RMIDs on the limbo lru inside of the SMP IPI
callback, intel_cqm_stable().

But that's pretty suboptimal if you have lots of MBM RMIDs and few CMT
RMIDs on the limbo lru because you'd be iterating most of the entries
in the callback function for no reason - you'd just skip them.

Instead what I suggest you explore is removing each MBM RMID from the
limbo lru and putting it on a function-local list on the stack in
intel_cqm_rmid_stabilize(). Since you are guaranteed to be allowed to
put the MBM RMID on the free lru (we don't need to stabilize it, so
the stabilzation can't fail) there's no need to worry about error
cases or anything like that.

-- 
Matt Fleming, Intel Open Source Technology Center
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