1) Global IPI on CBM <---> task change does not scale. * cbm_update_all() - Update the cache bit mask for all packages. */ static inline void cbm_update_all(u32 closid) { on_each_cpu_mask(&rdt_cpumask, cbm_cpu_update, (void *)closid, 1); } Consider a machine with 32 sockets. 2) Syscall interface specification is in kbytes, not cache ways (which is what must be recorded by the OS to allow migration of the OS between different hardware systems). 3) Compilers are able to configure cache optimally for given ranges of code inside applications, easily, if desired. 4) Problem-2: The decision to allocate cache is tied to application initialization / destruction, and application initialization is essentially random from the POV of the system (the events which trigger the execution of the application are not visible from the system). Think of a server running two different servers: one database with requests that are received with poisson distribution, average 30 requests per hour, and every request takes 1 minute. One httpd server with nearly constant load. Without cache reservations, database requests takes 2 minutes. That is not acceptable for the database clients. But with cache reservation, database requests takes 1 minute. You want to maximize performance of httpd and database requests What you do? You allow the database server to perform cache reservation once a request comes in, and to undo the reservation once the request is finished. Its impossible to perform this with a centralized interface. 5) Modify scenario 2 above as follows: each database request is handled by two newly created threads, and they share a certain percentage of data cache, and a certain percentage of code cache. So the dispatcher thread, on arrival of request, has to: - create data cache reservation = tcrid-A. - create code cache reservation = tcrid-B. - create thread-1. - assign tcird-A and B to thread-1. - create thread-2. - assign tcird-A and B to thread-2. 6) Create reservations in such a way that the sum is larger than total amount of cache, and CPU pinning (example from Karen Noel): VM-1 on socket-1 with 80% of reservation. VM-2 on socket-2 with 80% of reservation. VM-1 pinned to socket-1. VM-2 pinned to socket-2. Cgroups interface attempts to set a cache mask globally. This is the problem the "expand" proposal solves: https://lkml.org/lkml/2015/7/29/682