linux-kernel - Re: [PATCH v3 3/4] irqchip: GIC: Convert to EOImode == 1

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Message-ID: <alpine.DEB.2.11.1508251745070.15006@nanos>
Date:	Tue, 25 Aug 2015 17:46:44 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Marc Zyngier <marc.zyngier@....com>
cc:	Jason Cooper <jason@...edaemon.net>,
	Christoffer Dall <christoffer.dall@...aro.org>,
	Jiang Liu <jiang.liu@...ux.intel.com>,
	Eric Auger <eric.auger@...aro.org>,
	linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu,
	kvm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/4] irqchip: GIC: Convert to EOImode == 1

On Tue, 25 Aug 2015, Marc Zyngier wrote:
> +static struct static_key supports_deactivate = STATIC_KEY_INIT_TRUE;
> +
>  #ifndef MAX_GIC_NR
>  #define MAX_GIC_NR	1
>  #endif
> @@ -137,6 +140,14 @@ static inline unsigned int gic_irq(struct irq_data *d)
>  	return d->hwirq;
>  }
>  
> +static inline bool primary_gic_irq(struct irq_data *d)
> +{
> +	if (MAX_GIC_NR > 1)
> +		return irq_data_get_irq_chip_data(d) == &gic_data[0];
> +
> +	return true;
> +}
> +
>  /*
>   * Routines to acknowledge, disable and enable interrupts
>   */
> @@ -164,7 +175,14 @@ static void gic_unmask_irq(struct irq_data *d)
>  
>  static void gic_eoi_irq(struct irq_data *d)
>  {
> -	writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
> +	u32 deact_offset = GIC_CPU_EOI;
> +
> +	if (static_key_true(&supports_deactivate)) {
> +		if (primary_gic_irq(d))
> +			deact_offset = GIC_CPU_DEACTIVATE;

I really wonder for the whole series whether you really want all that
static key dance and extra conditionals in the callbacks instead of
just using seperate irq chips for the different interrupts.

Thanks,

	tglx
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