lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <55DDDE3C.8030609@imgtec.com>
Date:	Wed, 26 Aug 2015 16:41:48 +0100
From:	Qais Yousef <qais.yousef@...tec.com>
To:	Thomas Gleixner <tglx@...utronix.de>
CC:	Marc Zyngier <marc.zyngier@....com>,
	"alsa-devel@...a-project.org" <alsa-devel@...a-project.org>,
	Jason Cooper <jason@...edaemon.net>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mips@...ux-mips.org" <linux-mips@...ux-mips.org>,
	Mark Rutland <Mark.Rutland@....com>
Subject: Re: [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi

On 08/26/2015 04:08 PM, Thomas Gleixner wrote:
> On Wed, 26 Aug 2015, Qais Yousef wrote:
>> On 08/26/2015 02:19 PM, Thomas Gleixner wrote:
>>> Wrong. You cannot move an IPI around with set_affinity. It's possible
>>> to send an IPI to more than one target CPU, but that has nothing to do
>>> with affinities.
>>>
>>> Are you talking about IPIs or about general interrupts which have an
>>> affinity setting?
>> Maybe my view of the world is limited. I wrote this because the mechanism to
>> route an IPI and set affinities is the same.
> That might be the case on your particular platform, but that's not
> generally true.
>
>> So specifying which core or hardware thread should Linux CPU route this IPI to
>> is the same as setting the affinity, no? Linux will not move the IPI that is
>> routed to the coprocessor core. Just the IPI it will receive.
>>
>> Also the way I see it is that this is an external interrupt whether it was
>> asserted by real signal or through IPI mechanism and it should be treated as
>> such in terms of moving inside Linux SMP, no? Again maybe my view of the world
>> is limited but I can't see why migrating the interrupt would affect
>> correctness unless there's a hardware limitation like only core 0 can read
>> info from AXD (which is where my suggestion to using affinity hint above to
>> accommodate such limitations).
>>
>> When you say 'It is possible to send an IPI to more than one target CPU', is
>> it a case we need to cater for? The way I was seeing this problem is
>> communication between single Linux SMP and a single coprocessor unit. I didn't
>> think of it as single to many. Even if the coprocessor is a cluster I'd expect
>> it to act as a single unit like Linux SMP. And if it wanted to send 2
>> different interrupts it will need to use 2 different IPIs.
> You are confusing the terms.
>
> IPI = Inter Processor Interrupt
>
> As the name says that's an interrupt which goes from one cpu to
> another. So an IPI has a very clear target.

OK understood. My interpretation of the processor here was the 
difference. I was viewing the whole linux cpus as one unit with regard 
to its coprocessors.

>
> Whether the platform implements IPIs via general interrupts which are
> made affine to a particular cpu or some other specialized mechanism is
> completely irrelevant. An IPI is not subject to affinity settings,
> period.
>
> So if you want to use an IPI then you need a target cpu for that IPI.
>
> If you want something which can be affined to any cpu, then you need a
> general interrupt and not an IPI.

We are using IPIs to exchange interrupts. Affinity is not important to me.

Thanks,
Qais

>
> That's what I asked before and you still did not answer that question.
>
>>> Are you talking about IPIs or about general interrupts which have an
>>> affinity setting?
> Thanks,
>
> 	tglx

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ