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Message-Id: <20150827171102.745D334C@viggo.jf.intel.com>
Date: Thu, 27 Aug 2015 10:11:02 -0700
From: Dave Hansen <dave@...1.net>
To: dave@...1.net
Cc: dave.hansen@...ux.intel.com, mingo@...hat.com, x86@...nel.org,
bp@...en8.de, fenghua.yu@...el.com, tim.c.chen@...ux.intel.com,
linux-kernel@...r.kernel.org
Subject: [PATCH 01/11] x86, fpu: kill LWP support
From: Dave Hansen <dave.hansen@...ux.intel.com>
LightWeight Profiling was evidently an AMD profiling feature that
we never got around to implementing. Remove the references to it.
This patch is a *bit* worrisome becuase it will implicitly cause
'struct xregs_state' to shrink. This effectively removes some
unused padding that we had in there. It might expose other bugs.
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: x86@...nel.org
Cc: Borislav Petkov <bp@...en8.de>
Cc: Fenghua Yu <fenghua.yu@...el.com>
Cc: Tim Chen <tim.c.chen@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org
---
b/arch/x86/include/asm/fpu/types.h | 6 ------
1 file changed, 6 deletions(-)
diff -puN arch/x86/include/asm/fpu/types.h~axe-lwp arch/x86/include/asm/fpu/types.h
--- a/arch/x86/include/asm/fpu/types.h~axe-lwp 2015-08-27 10:08:01.195617135 -0700
+++ b/arch/x86/include/asm/fpu/types.h 2015-08-27 10:08:01.198617272 -0700
@@ -132,11 +132,6 @@ struct ymmh_struct {
u8 ymmh_space[256];
};
-/* We don't support LWP yet: */
-struct lwp_struct {
- u8 reserved[128];
-};
-
/* Intel MPX support: */
struct bndreg {
u64 lower_bound;
@@ -161,7 +156,6 @@ struct xstate_header {
/* New processor state extensions should be added here: */
#define XSTATE_RESERVE (sizeof(struct ymmh_struct) + \
- sizeof(struct lwp_struct) + \
sizeof(struct mpx_struct) )
/*
* This is our most modern FPU state format, as saved by the XSAVE
_
--
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