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Message-Id: <20150831222056.6747B089@viggo.jf.intel.com>
Date: Mon, 31 Aug 2015 15:20:56 -0700
From: Dave Hansen <dave@...1.net>
To: dave@...1.net
Cc: dave.hansen@...ux.intel.com, mingo@...hat.com, x86@...nel.org,
bp@...en8.de, fenghua.yu@...el.com, tim.c.chen@...ux.intel.com,
linux-kernel@...r.kernel.org
Subject: [PATCH 11/15] x86, fpu: rework YMM definition
From: Dave Hansen <dave.hansen@...ux.intel.com>
We are about to rework all of the "extended state" definitions.
This makes the 'ymm' naming consistent with the AVX-512 types
we will introduce later.
We also add a convenience type: "reg_128_bit" so that we do
not have to spell out our arithmetic.
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: x86@...nel.org
Cc: Borislav Petkov <bp@...en8.de>
Cc: Fenghua Yu <fenghua.yu@...el.com>
Cc: Tim Chen <tim.c.chen@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org
---
b/arch/x86/include/asm/fpu/types.h | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff -puN arch/x86/include/asm/fpu/types.h~x86-fpu-rework-ymm-types arch/x86/include/asm/fpu/types.h
--- a/arch/x86/include/asm/fpu/types.h~x86-fpu-rework-ymm-types 2015-08-31 15:17:35.919952013 -0700
+++ b/arch/x86/include/asm/fpu/types.h 2015-08-31 15:17:35.922952150 -0700
@@ -128,17 +128,23 @@ enum xfeature {
#define FIRST_EXTENDED_XFEATURE XFEATURE_YMM
+struct reg_128_bit {
+ u8 regbytes[128/8];
+};
+
/*
+ * State component 2:
+ *
* There are 16x 256-bit AVX registers named YMM0-YMM15.
* The low 128 bits are aliased to the 16 SSE registers (XMM0-XMM15)
- * and are stored in 'struct fxregs_state::xmm_space[]'.
+ * and are stored in 'struct fxregs_state::xmm_space[]' in the
+ * "legacy" area.
*
- * The high 128 bits are stored here:
- * 16x 128 bits == 256 bytes.
+ * The high 128 bits are stored here.
*/
struct ymmh_struct {
- u8 ymmh_space[256];
-};
+ struct reg_128_bit hi_ymm[16];
+} __packed;
/* Intel MPX support: */
_
--
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