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Message-ID: <55E84E17.2090409@rock-chips.com>
Date: Thu, 3 Sep 2015 21:41:43 +0800
From: Shawn Lin <shawn.lin@...k-chips.com>
To: Mark Brown <broonie@...nel.org>
Cc: shawn.lin@...k-chips.com, Vinod Koul <vinod.koul@...el.com>,
Heiko Stuebner <heiko@...ech.de>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Doug Anderson <dianders@...omium.org>,
Olof Johansson <olofj@...gle.com>,
Sonny Rao <sonnyrao@...omium.org>,
Addy Ke <addy.ke@...k-chips.com>, dmaengine@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, alsa-devel@...a-project.org,
linux-spi@...r.kernel.org, Olof Johansson <olof@...om.net>
Subject: Re: [PATCH v3 8/9] spi: rockchip: modify DMA max burst to 1
On 2015/9/3 20:54, Mark Brown wrote:
> On Tue, Sep 01, 2015 at 05:58:44PM +0800, Shawn Lin wrote:
>
>> Generic dma controller on Rockchips' platform cannot support
>> DMAFLUSHP instruction which make dma to flush the req of non-aligned
>> or non-multiple of what we need. That will cause an unrecoverable
>> dma bus error. The saftest way is to set dma max burst to 1.
>
> If this is a quirk of the DMA controller why is it being fixed with a
> property specific to the SPI controller? Can't the DMA controller just
> override the burst size?
>
Cool...that's a good question. Actually DMA controller can't do that
since block peripheral controller(e.g sd/emmc, they always access data
by block-512Bytes.) can't meet the case. So It's hard for dma controller
know who is the caller, and what should be done.
The only thing dma controller can do is avoid to execute DMAFLUSHP on
its own. But how about peripheral controller trigger non-multiple
access? So that's what I mentioned on covery letter that we should do
"broken things" for both dma controller and some peripherals.
>> +#define ROCKCHIP_SPI_BORKEN_BURST_LEN (1<<0) /* broken burst len*/
>
> This is misspelt.
Woops, sorry for the bit. Thanks, Mark.
>
--
Best Regards
Shawn Lin
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