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Message-ID: <1441532075-9452-1-git-send-email-dingtianhong@huawei.com>
Date: Sun, 6 Sep 2015 17:34:33 +0800
From: Ding Tianhong <dingtianhong@...wei.com>
To: <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <catalin.marinas@....com>,
<will.deacon@....com>, <devicetree@...r.kernel.org>,
<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
<marc.zyngier@....com>, <ijc+devicetree@...lion.org.uk>,
<galak@...eaurora.org>, <rob.herring@...aro.org>,
<haojian.zhuang@...aro.org>, <zhangfei.gao@...aro.org>,
<xuwei5@...ilicon.com>, <leo.yan@...aro.org>,
<zhizhou.zh@...il.com>, <linuxarm@...wei.com>
Subject: [PATCH v3 0/2] arm64: Support Hisilicon Hip05-D02 board
Hip05-D02 Development Board is based on Cortex-A57, this patchset
contains initial support for Hip05-D02 Soc and Board. Initial support
is minimal and includes just the arch configuration, device tree
configuration.
PSCI is enabled in device tree and there is no problem to boot all the
16 cores, and the CPU hotplug is also working now, you can download and
compile the latest firmware based on the following link to run this
patch set.
https://github.com/hisilicon/estuary/blob/master/README
v3->v2:
- 1. Change the compatible name for per CPU to arm,cortex-a57.
2. limit the ITS region to 256k.
v1->v2:
- 1. Change the compatible name for per CPU.
2. Remove the GIC_CPU_MASK_SIMPLE(xx) which is not used for gicv3
from hip05.dtsi.
Ding Tianhong (2):
arm64: hip05-d02: Document devicetree bindings for Hisilicon Hip05-D02
Board
arm64: dts: add dts files for Hisilicon Hip05-D02 Development Board
.../bindings/arm/hisilicon/hisilicon.txt | 4 +
arch/arm64/boot/dts/hisilicon/Makefile | 2 +-
arch/arm64/boot/dts/hisilicon/hip05-d02.dts | 36 +++
arch/arm64/boot/dts/hisilicon/hip05.dtsi | 271 +++++++++++++++++++++
4 files changed, 312 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/hisilicon/hip05-d02.dts
create mode 100644 arch/arm64/boot/dts/hisilicon/hip05.dtsi
--
1.9.0
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