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Message-ID: <20150907074218.GC19280@gmail.com>
Date: Mon, 7 Sep 2015 09:42:18 +0200
From: Ingo Molnar <mingo@...nel.org>
To: "Maciej W. Rozycki" <macro@...ux-mips.org>
Cc: Borislav Petkov <bp@...en8.de>,
Andy Lutomirski <luto@...capital.net>,
Paolo Bonzini <pbonzini@...hat.com>,
Peter Zijlstra <peterz@...radead.org>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Willy Tarreau <w@....eu>, Steven Rostedt <rostedt@...dmis.org>,
X86 ML <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Brian Gerst <brgerst@...il.com>
Subject: Re: Dealing with the NMI mess
* Maciej W. Rozycki <macro@...ux-mips.org> wrote:
> I did some work on this a few years ago, including emulating DR0-7 accesses in
> software down the JTAG handler upon a General Detect fault to keep the kernel
> both happy and away from real debug registers. ;) Yes, you can debug any
> software with this stuff, including the Linux kernel: set instruction and data
> breakpoints, single-step it, poke at all hardware registers, including
> descriptor registers not otherwise accessible (you can set funny modes for
> segments, also in the 64-bit mode), etc. One complication though is you operate
> on physical addresses when poking at memory, you can't ask the CPU's MMU to
> remap them for you (you can walk page tables manually of course, just as the MMU
> would).
Essentially the ICE breakpoint instruction enters SMM mode?
Thanks,
Ingo
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